From patchwork Mon May 5 16:00:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 345754 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E2DB2140312 for ; Tue, 6 May 2014 02:04:04 +1000 (EST) Received: from localhost ([::1]:58284 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhLN4-00030w-Pq for incoming@patchwork.ozlabs.org; Mon, 05 May 2014 12:04:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43056) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhLJx-0006u8-UC for qemu-devel@nongnu.org; Mon, 05 May 2014 12:00:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WhLJr-0000xe-UK for qemu-devel@nongnu.org; Mon, 05 May 2014 12:00:49 -0400 Received: from mail-oa0-x22d.google.com ([2607:f8b0:4003:c02::22d]:53581) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhLJr-0000uf-J8 for qemu-devel@nongnu.org; Mon, 05 May 2014 12:00:43 -0400 Received: by mail-oa0-f45.google.com with SMTP id l6so1296760oag.4 for ; Mon, 05 May 2014 09:00:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ntzn+zcOVw0biOT/Qc8bZDWwo+Kvrq25VFOC1hCANlU=; b=d0lgK1ijFN5ZJDLilID1I4V6LnzmrVSAgY6PCmxiWG0TJMub+N5FJy8UPB5rhK/8z3 +S/4p7ePOHFmx1ZOO3mXXcMQppdURqggeIawaFnSXEO3rAT/OuHdgBly3QHjiuZqsUfj v/E+AGCRt3iMRpwjvgBZvFBw7REgF0R/G5gG7rk9FGukIp0npHSeAAyUqi1JiMrULjPK R3a77mgI3jG5fV+seViz6MHwpTaHPJ91aD9SHYapAnsy/O45jgylXin62T7OfO4Xa//g mmNVnjF26jgBM8U0PcMk7c35GUMeggicqftGdqfSMLv/npb7owksrSeMteQ6AnUn4a6Z 5UtQ== X-Received: by 10.182.42.228 with SMTP id r4mr33315720obl.20.1399305642881; Mon, 05 May 2014 09:00:42 -0700 (PDT) Received: from localhost.localdomain (72-48-77-163.dyn.grandenetworks.net. [72.48.77.163]) by mx.google.com with ESMTPSA id dw5sm20133189obb.0.2014.05.05.09.00.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 May 2014 09:00:42 -0700 (PDT) From: Rob Herring To: Peter Maydell Date: Mon, 5 May 2014 11:00:23 -0500 Message-Id: <1399305623-22016-8-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1399305623-22016-1-git-send-email-robherring2@gmail.com> References: <1399305623-22016-1-git-send-email-robherring2@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c02::22d Cc: Rob Herring , qemu-devel@nongnu.org, Christoffer Dall Subject: [Qemu-devel] [PATCH 7/7] arm/highbank: enable PSCI emulation support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rob Herring Enable PSCI enulation on highbank and midway platforms. Note that this requires fixing the PSCI function IDs in the DTB to match what QEMU is using. This should get fixed. Signed-off-by: Rob Herring --- hw/arm/highbank.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 46b9f1e..092df1f 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -242,6 +242,14 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) cpuobj = object_new(object_class_get_name(oc)); cpu = ARM_CPU(cpuobj); + object_property_set_int(cpuobj, QEMU_PSCI_METHOD_SMC, "psci-method", + NULL); + + /* Secondary CPUs start in PSCI powered-down state */ + if (n > 0) { + object_property_set_bool(cpuobj, true, "start-powered-off", NULL); + } + if (object_property_find(cpuobj, "reset-cbar", NULL)) { object_property_set_int(cpuobj, MPCORE_PERIPHBASE, "reset-cbar", &error_abort);