From patchwork Sat Dec 21 02:02:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 304355 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 777152C0096 for ; Sat, 21 Dec 2013 13:03:38 +1100 (EST) Received: from localhost ([::1]:52530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuBue-0004rl-PY for incoming@patchwork.ozlabs.org; Fri, 20 Dec 2013 21:03:32 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuBuJ-0004rf-2f for qemu-devel@nongnu.org; Fri, 20 Dec 2013 21:03:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VuBuD-0001Nk-3u for qemu-devel@nongnu.org; Fri, 20 Dec 2013 21:03:11 -0500 Received: from mx1.redhat.com ([209.132.183.28]:8111) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuBuC-0001N1-S9 for qemu-devel@nongnu.org; Fri, 20 Dec 2013 21:03:05 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id rBL232ZP011803 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 20 Dec 2013 21:03:02 -0500 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-18.ams2.redhat.com [10.36.116.18]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id rBL230d7017660; Fri, 20 Dec 2013 21:03:01 -0500 From: Laszlo Ersek To: kraxel@redhat.com, mst@redhat.com, qemu-devel@nongnu.org Date: Sat, 21 Dec 2013 03:02:50 +0100 Message-Id: <1387591370-28424-1-git-send-email-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3] piix: fix 32bit pci hole X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Gerd Hoffmann Make the 32bit pci hole start at end of ram, so all possible address space is covered. Of course the firmware can use less than that. Leaving space unused is no problem, mapping pci bars outside the hole causes problems though. Signed-off-by: Gerd Hoffmann Forward ported to 83d08f26 ("pc: map PCI address space as catchall region for not mapped addresses"). Signed-off-by: Laszlo Ersek --- include/hw/i386/pc.h | 1 + hw/i386/pc_piix.c | 1 + hw/pci-host/piix.c | 11 ++--------- 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 24eb3de..eb3da96 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -182,6 +182,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, + ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_memory, MemoryRegion *ram_memory); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4e0dae7..eed892b 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -157,6 +157,7 @@ static void pc_init1(QEMUMachineInitArgs *args, if (pci_enabled) { pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, args->ram_size, + below_4g_mem_size, above_4g_mem_size, pci_memory, ram_memory); } else { diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 63be7f6..4229d09 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -311,6 +311,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, + ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_address_space, MemoryRegion *ram_memory) @@ -340,15 +341,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, f->ram_memory = ram_memory; i440fx = I440FX_PCI_HOST_BRIDGE(dev); - /* Set PCI window size the way seabios has always done it. */ - /* Power of 2 so bios can cover it with a single MTRR */ - if (ram_size <= 0x80000000) { - i440fx->pci_info.w32.begin = 0x80000000; - } else if (ram_size <= 0xc0000000) { - i440fx->pci_info.w32.begin = 0xc0000000; - } else { - i440fx->pci_info.w32.begin = 0xe0000000; - } + i440fx->pci_info.w32.begin = below_4g_mem_size; /* setup pci memory mapping */ pc_pci_as_mapping_init(OBJECT(f), f->system_memory,