From patchwork Fri Oct 11 10:53:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 282710 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2D2DA2C0091 for ; Fri, 11 Oct 2013 21:55:35 +1100 (EST) Received: from localhost ([::1]:53529 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUaNX-0003sr-H2 for incoming@patchwork.ozlabs.org; Fri, 11 Oct 2013 06:55:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35613) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUaNF-0003se-4s for qemu-devel@nongnu.org; Fri, 11 Oct 2013 06:55:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VUaN6-0007fm-3V for qemu-devel@nongnu.org; Fri, 11 Oct 2013 06:55:13 -0400 Received: from p15195424.pureserver.info ([82.165.34.74]:55302) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VUaMz-0007UF-O4; Fri, 11 Oct 2013 06:54:57 -0400 Received: from [149.241.34.189] (helo=kentang.lan) by p15195424.pureserver.info with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.43) id 1VUaMp-0001jc-R4; Fri, 11 Oct 2013 11:54:54 +0100 From: Mark Cave-Ayland To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Date: Fri, 11 Oct 2013 11:53:48 +0100 Message-Id: <1381488828-22575-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 149.241.34.189 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.1 (built Wed, 05 Jan 2005 10:54:05 -0500) X-SA-Exim-Scanned: Yes (on p15195424.pureserver.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 82.165.34.74 Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Mark Cave-Ayland , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Alexander Graf Subject: [Qemu-devel] [PATCH] PPC: fix PCI configuration space MemoryRegions for grackle/uninorth X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org OpenBIOS prior to SVN r1225 had a horrible bug when accessing PCI configuration space for PPC Mac architectures - instead of writing the PCI configuration data value to the data register address, it would instead write it to the data register address plus the PCI configuration address. For this reason, the MemoryRegions for the PCI data register for grackle/uninorth were extremely large in order to accomodate the entire PCI configuration space being accessed during OpenBIOS PCI bus enumeration. Now that the OpenBIOS images have been updated, reduce the MemoryRegion sizes down to a single 32-bit register as intended. Signed-off-by: Mark Cave-Ayland CC: Hervé Poussineau CC: Andreas Färber CC: Alexander Graf Tested-by: Hervé Poussineau --- hw/pci-host/grackle.c | 4 ++-- hw/pci-host/uninorth.c | 16 ++++++++-------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 4991ec4..d70c519 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -105,9 +105,9 @@ static int pci_grackle_init_device(SysBusDevice *dev) phb = PCI_HOST_BRIDGE(dev); memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + dev, "pci-conf-idx", 4); memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops, - dev, "pci-data-idx", 0x1000); + dev, "pci-data-idx", 4); sysbus_init_mmio(dev, &phb->conf_mem); sysbus_init_mmio(dev, &phb->data_mem); diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 91530cd..ad92c35 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -153,9 +153,9 @@ static int pci_unin_main_init_device(SysBusDevice *dev) h = PCI_HOST_BRIDGE(dev); memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + dev, "pci-conf-idx", 4); memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, - "pci-conf-data", 0x1000); + "pci-conf-data", 4); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -171,9 +171,9 @@ static int pci_u3_agp_init_device(SysBusDevice *dev) h = PCI_HOST_BRIDGE(dev); memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + dev, "pci-conf-idx", 4); memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, - "pci-conf-data", 0x1000); + "pci-conf-data", 4); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -188,9 +188,9 @@ static int pci_unin_agp_init_device(SysBusDevice *dev) h = PCI_HOST_BRIDGE(dev); memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + dev, "pci-conf-idx", 4); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - dev, "pci-conf-data", 0x1000); + dev, "pci-conf-data", 4); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); return 0; @@ -204,9 +204,9 @@ static int pci_unin_internal_init_device(SysBusDevice *dev) h = PCI_HOST_BRIDGE(dev); memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, - dev, "pci-conf-idx", 0x1000); + dev, "pci-conf-idx", 4); memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, - dev, "pci-conf-data", 0x1000); + dev, "pci-conf-data", 4); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); return 0;