diff mbox

PPC: fix PCI configuration space MemoryRegions for grackle/uninorth

Message ID 1381488828-22575-1-git-send-email-mark.cave-ayland@ilande.co.uk
State New
Headers show

Commit Message

Mark Cave-Ayland Oct. 11, 2013, 10:53 a.m. UTC
OpenBIOS prior to SVN r1225 had a horrible bug when accessing PCI
configuration space for PPC Mac architectures - instead of writing the PCI
configuration data value to the data register address, it would instead write
it to the data register address plus the PCI configuration address.

For this reason, the MemoryRegions for the PCI data register for
grackle/uninorth were extremely large in order to accomodate the entire PCI
configuration space being accessed during OpenBIOS PCI bus enumeration. Now
that the OpenBIOS images have been updated, reduce the MemoryRegion sizes down
to a single 32-bit register as intended.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
CC: Hervé Poussineau <hpoussin@reactos.org>
CC: Andreas Färber <afaerber@suse.de>
CC: Alexander Graf <agraf@suse.de>
---
 hw/pci-host/grackle.c  |    4 ++--
 hw/pci-host/uninorth.c |   16 ++++++++--------
 2 files changed, 10 insertions(+), 10 deletions(-)

Comments

Hervé Poussineau Oct. 11, 2013, 6:43 p.m. UTC | #1
Mark Cave-Ayland a écrit :
> OpenBIOS prior to SVN r1225 had a horrible bug when accessing PCI
> configuration space for PPC Mac architectures - instead of writing the PCI
> configuration data value to the data register address, it would instead write
> it to the data register address plus the PCI configuration address.
> 
> For this reason, the MemoryRegions for the PCI data register for
> grackle/uninorth were extremely large in order to accomodate the entire PCI
> configuration space being accessed during OpenBIOS PCI bus enumeration. Now
> that the OpenBIOS images have been updated, reduce the MemoryRegion sizes down
> to a single 32-bit register as intended.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> CC: Hervé Poussineau <hpoussin@reactos.org>
> CC: Andreas Färber <afaerber@suse.de>
> CC: Alexander Graf <agraf@suse.de>

Tested-by: Hervé Poussineau <hpoussin@reactos.org>
Alexander Graf Nov. 8, 2013, 3:20 a.m. UTC | #2
On 11.10.2013, at 12:53, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> wrote:

> OpenBIOS prior to SVN r1225 had a horrible bug when accessing PCI
> configuration space for PPC Mac architectures - instead of writing the PCI
> configuration data value to the data register address, it would instead write
> it to the data register address plus the PCI configuration address.
> 
> For this reason, the MemoryRegions for the PCI data register for
> grackle/uninorth were extremely large in order to accomodate the entire PCI
> configuration space being accessed during OpenBIOS PCI bus enumeration. Now
> that the OpenBIOS images have been updated, reduce the MemoryRegion sizes down
> to a single 32-bit register as intended.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> CC: Hervé Poussineau <hpoussin@reactos.org>
> CC: Andreas Färber <afaerber@suse.de>
> CC: Alexander Graf <agraf@suse.de>

With this patch applied, mac99 emulation seems to break:

  http://award.ath.cx/results/288-alex/x86/kvm.qemu-git-tcg.ppc-debian.mac99-G4.etch.e1000.reboot/debug/serial-vm1.log


Alex
diff mbox

Patch

diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 4991ec4..d70c519 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -105,9 +105,9 @@  static int pci_grackle_init_device(SysBusDevice *dev)
     phb = PCI_HOST_BRIDGE(dev);
 
     memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
-                          dev, "pci-conf-idx", 0x1000);
+                          dev, "pci-conf-idx", 4);
     memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
-                          dev, "pci-data-idx", 0x1000);
+                          dev, "pci-data-idx", 4);
     sysbus_init_mmio(dev, &phb->conf_mem);
     sysbus_init_mmio(dev, &phb->data_mem);
 
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 91530cd..ad92c35 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -153,9 +153,9 @@  static int pci_unin_main_init_device(SysBusDevice *dev)
     h = PCI_HOST_BRIDGE(dev);
 
     memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
-                          dev, "pci-conf-idx", 0x1000);
+                          dev, "pci-conf-idx", 4);
     memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
-                          "pci-conf-data", 0x1000);
+                          "pci-conf-data", 4);
     sysbus_init_mmio(dev, &h->conf_mem);
     sysbus_init_mmio(dev, &h->data_mem);
 
@@ -171,9 +171,9 @@  static int pci_u3_agp_init_device(SysBusDevice *dev)
     h = PCI_HOST_BRIDGE(dev);
 
     memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
-                          dev, "pci-conf-idx", 0x1000);
+                          dev, "pci-conf-idx", 4);
     memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev,
-                          "pci-conf-data", 0x1000);
+                          "pci-conf-data", 4);
     sysbus_init_mmio(dev, &h->conf_mem);
     sysbus_init_mmio(dev, &h->data_mem);
 
@@ -188,9 +188,9 @@  static int pci_unin_agp_init_device(SysBusDevice *dev)
     h = PCI_HOST_BRIDGE(dev);
 
     memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
-                          dev, "pci-conf-idx", 0x1000);
+                          dev, "pci-conf-idx", 4);
     memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
-                          dev, "pci-conf-data", 0x1000);
+                          dev, "pci-conf-data", 4);
     sysbus_init_mmio(dev, &h->conf_mem);
     sysbus_init_mmio(dev, &h->data_mem);
     return 0;
@@ -204,9 +204,9 @@  static int pci_unin_internal_init_device(SysBusDevice *dev)
     h = PCI_HOST_BRIDGE(dev);
 
     memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops,
-                          dev, "pci-conf-idx", 0x1000);
+                          dev, "pci-conf-idx", 4);
     memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
-                          dev, "pci-conf-data", 0x1000);
+                          dev, "pci-conf-data", 4);
     sysbus_init_mmio(dev, &h->conf_mem);
     sysbus_init_mmio(dev, &h->data_mem);
     return 0;