From patchwork Sun Sep 29 14:40:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Apfelbaum X-Patchwork-Id: 278870 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8322A2C0086 for ; Mon, 30 Sep 2013 00:42:47 +1000 (EST) Received: from localhost ([::1]:44981 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VQICr-000259-Fu for incoming@patchwork.ozlabs.org; Sun, 29 Sep 2013 10:42:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55101) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VQIBF-0008FB-2R for qemu-devel@nongnu.org; Sun, 29 Sep 2013 10:41:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VQIB8-0001o7-0A for qemu-devel@nongnu.org; Sun, 29 Sep 2013 10:41:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58546) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VQIB7-0001o1-N5 for qemu-devel@nongnu.org; Sun, 29 Sep 2013 10:40:57 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r8TEeooU021029 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 29 Sep 2013 10:40:51 -0400 Received: from localhost.tlv.redhat.com (dhcp-4-195.tlv.redhat.com [10.35.4.195]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id r8TEefGP022771; Sun, 29 Sep 2013 10:40:47 -0400 From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Sun, 29 Sep 2013 17:40:55 +0300 Message-Id: <1380465657-22600-2-git-send-email-marcel.a@redhat.com> In-Reply-To: <1380465657-22600-1-git-send-email-marcel.a@redhat.com> References: <1380465657-22600-1-git-send-email-marcel.a@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kwolf@redhat.com, peter.crosthwaite@xilinx.com, stefanha@redhat.com, mst@redhat.com, sw@weilnetz.de, jasowang@redhat.com, dkoch@verizon.com, alex.williamson@redhat.com, av1474@comtv.ru, paul@codesourcery.com, anthony@codemonkey.ws, pbonzini@redhat.com, afaerber@suse.de, kraxel@redhat.com Subject: [Qemu-devel] [PATCH 1/3] hw/pci: set irq without selecting INTx pin X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin on each call. Replaced the call to qemu_set_irq with a new wrapper pci_set_irq which triggers the irq based on PCI_INTERRUPT_PIN. Renamed a static method which was named already pci_set_irq. Signed-off-by: Marcel Apfelbaum --- hw/pci/pci.c | 6 +++--- include/hw/pci/pci.h | 7 +++++++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1f4e707..f16f4de 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -83,7 +83,7 @@ static const TypeInfo pcie_bus_info = { static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); static void pci_update_mappings(PCIDevice *d); -static void pci_set_irq(void *opaque, int irq_num, int level); +static void pci_irq_handler(void *opaque, int irq_num, int level); static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom); static void pci_del_option_rom(PCIDevice *pdev); @@ -975,7 +975,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, pci_dev->config_read = config_read; pci_dev->config_write = config_write; bus->devices[devfn] = pci_dev; - pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS); + pci_dev->irq = qemu_allocate_irqs(pci_irq_handler, pci_dev, PCI_NUM_PINS); pci_dev->version_id = 2; /* Current pci device vmstate version */ return pci_dev; } @@ -1292,7 +1292,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) /* generic PCI irq support */ /* 0 <= irq_num <= 3. level must be 0 or 1 */ -static void pci_set_irq(void *opaque, int irq_num, int level) +static void pci_irq_handler(void *opaque, int irq_num, int level) { PCIDevice *pci_dev = opaque; int change; diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d69e06d..0d4521c 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -634,6 +634,13 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); +static inline void pci_set_irq(PCIDevice *pci_dev, int level) +{ + uint8_t intx = pci_get_byte(pci_dev->config + PCI_INTERRUPT_PIN) - 1; + + qemu_set_irq(pci_dev->irq[intx], level); +} + static inline int pci_is_express(const PCIDevice *d) { return d->cap_present & QEMU_PCI_CAP_EXPRESS;