From patchwork Thu Aug 29 20:51:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 270943 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A0FA12C009D for ; Fri, 30 Aug 2013 06:53:58 +1000 (EST) Received: from localhost ([::1]:45717 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VF9E4-0005dS-MF for incoming@patchwork.ozlabs.org; Thu, 29 Aug 2013 16:53:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VF9Bz-0002cE-5N for qemu-devel@nongnu.org; Thu, 29 Aug 2013 16:51:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VF9Bq-0004AH-H2 for qemu-devel@nongnu.org; Thu, 29 Aug 2013 16:51:47 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:40403) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VF9Bq-00049y-9f for qemu-devel@nongnu.org; Thu, 29 Aug 2013 16:51:38 -0400 Received: from [2001:470:d4ed:1:2db:dfff:fe14:52d] (helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1VF9Bo-0002Ac-DF; Thu, 29 Aug 2013 22:51:36 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1VF9Be-0006IY-Tr; Thu, 29 Aug 2013 22:51:26 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Thu, 29 Aug 2013 22:51:24 +0200 Message-Id: <1377809485-24004-3-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1377809485-24004-1-git-send-email-aurelien@aurel32.net> References: <1377809485-24004-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:470:1f0b:4a8::1 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH v3 2/3] tcg/mips: inline bswap16/bswap32 ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use an inline version for the bswap16 and bswap32 ops to avoid testing for MIPS32R2 instructions availability, as these ops are only available in that case. Signed-off-by: Aurelien Jarno --- tcg/mips/tcg-target.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 9b518c2..daaf722 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1506,13 +1506,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, } break; - /* The bswap routines do not work on non-R2 CPU. In that case - we let TCG generating the corresponding code. */ case INDEX_op_bswap16_i32: - tcg_out_bswap16(s, args[0], args[1]); + tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]); break; case INDEX_op_bswap32_i32: - tcg_out_bswap32(s, args[0], args[1]); + tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]); + tcg_out_opc_sa(s, OPC_ROTR, args[0], args[0], 16); break; case INDEX_op_ext8s_i32: