From patchwork Wed Aug 28 12:17:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 270487 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id AD5492C007C for ; Wed, 28 Aug 2013 22:18:20 +1000 (EST) Received: from localhost ([::1]:34300 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEehW-0006zd-Si for incoming@patchwork.ozlabs.org; Wed, 28 Aug 2013 08:18:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEeh8-0006wz-5E for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VEeh1-0003am-J7 for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:54 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:33011) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEeh1-0003ag-Bd for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:47 -0400 Received: from wifi1x-pers125.univ-lyon1.fr ([134.214.250.129] helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1VEegz-0000C0-RR; Wed, 28 Aug 2013 14:17:45 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1VEegu-0005CV-6v; Wed, 28 Aug 2013 14:17:40 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 28 Aug 2013 14:17:39 +0200 Message-Id: <1377692259-19959-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:470:1f0b:4a8::1 Cc: Paolo Bonzini , qemu-stable@nongnu.org, Aurelien Jarno Subject: [Qemu-devel] [PATCH] pcnet-pci: mark I/O and MMIO as LITTLE_ENDIAN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Now that the memory subsystem is propagating the endianness correctly, the pcnet-pci device should have its I/O ports and MMIO memory marked as LITTLE_ENDIAN, as PCI devices are little endian. This makes the pcnet-pci NIC to work again on big endian MIPS Malta (default NIC). Cc: qemu-stable@nongnu.org Signed-off-by: Aurelien Jarno Reviewed-by: Stefan Hajnoczi --- hw/net/pcnet-pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index a893165..865f2f0 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr, static const MemoryRegionOps pcnet_io_ops = { .read = pcnet_ioport_read, .write = pcnet_ioport_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val) @@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = { .read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl }, .write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel }, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pci_physical_memory_write(void *dma_opaque, hwaddr addr,