From patchwork Wed May 1 14:40:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ed Maste X-Patchwork-Id: 240773 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8A17C2C00D2 for ; Thu, 2 May 2013 00:41:24 +1000 (EST) Received: from localhost ([::1]:53848 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXYDi-0005q0-K9 for incoming@patchwork.ozlabs.org; Wed, 01 May 2013 10:41:22 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXYDN-0005nr-Cd for qemu-devel@nongnu.org; Wed, 01 May 2013 10:41:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UXYDJ-00077C-Fg for qemu-devel@nongnu.org; Wed, 01 May 2013 10:41:01 -0400 Received: from [216.171.111.232] (port=58913 helo=freebsd.org) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXYDJ-00076o-B0 for qemu-devel@nongnu.org; Wed, 01 May 2013 10:40:57 -0400 Received: from emaste (uid 1001) (envelope-from emaste@freebsd.org) id 9dbef by freebsd.org (DragonFly Mail Agent 1); Wed, 01 May 2013 10:40:54 -0400 From: Ed Maste To: qemu-devel@nongnu.org Date: Wed, 1 May 2013 10:40:53 -0400 Message-Id: <1367419253-53868-1-git-send-email-emaste@freebsd.org> X-Mailer: git-send-email 1.7.11.5 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x X-Received-From: 216.171.111.232 Cc: qemu-trivial@nongnu.org, Ed Maste Subject: [Qemu-devel] [PATCH] m25p80.c: Sync Flash chip list with Linux X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add new devices for various manufacturers, and re-sort Spansion list to match the order in Linux, which requires chips with a non-zero extended ID to come first. With this commit the outstanding differences to Linux rev 55bf75b are: - Erase size flag differences in s25sl032p, s25sl064p, s25fl016k, s25fl064k (These devices have only some blocks that support small erase sizes.) - Linux lacks n25q128 - Devices without a Jedec ID have been excluded Signed-off-by: Ed Maste --- hw/block/m25p80.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index b3ca19a..759c84d 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -91,18 +91,27 @@ static const FlashPartInfo known_devices[] = { { INFO("at26df161a", 0x1f4601, 0, 64 << 10, 32, ER_4K) }, { INFO("at26df321", 0x1f4700, 0, 64 << 10, 64, ER_4K) }, + { INFO("at45db081d", 0x1f2500, 0, 64 << 10, 16, ER_4K) }, + /* EON -- en25xxx */ { INFO("en25f32", 0x1c3116, 0, 64 << 10, 64, ER_4K) }, { INFO("en25p32", 0x1c2016, 0, 64 << 10, 64, 0) }, { INFO("en25q32b", 0x1c3016, 0, 64 << 10, 64, 0) }, { INFO("en25p64", 0x1c2017, 0, 64 << 10, 128, 0) }, + { INFO("en25q64", 0x1c3017, 0, 64 << 10, 128, ER_4K) }, + + /* GigaDevice */ + { INFO("gd25q32", 0xc84016, 0, 64 << 10, 64, ER_4K) }, + { INFO("gd25q64", 0xc84017, 0, 64 << 10, 128, ER_4K) }, /* Intel/Numonyx -- xxxs33b */ { INFO("160s33b", 0x898911, 0, 64 << 10, 32, 0) }, { INFO("320s33b", 0x898912, 0, 64 << 10, 64, 0) }, { INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) }, + { INFO("n25q064", 0x20ba17, 0, 64 << 10, 128, 0) }, /* Macronix */ + { INFO("mx25l2005a", 0xc22012, 0, 64 << 10, 4, ER_4K) }, { INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) }, { INFO("mx25l8005", 0xc22014, 0, 64 << 10, 16, 0) }, { INFO("mx25l1606e", 0xc22015, 0, 64 << 10, 32, ER_4K) }, @@ -113,15 +122,16 @@ static const FlashPartInfo known_devices[] = { { INFO("mx25l25635e", 0xc22019, 0, 64 << 10, 512, 0) }, { INFO("mx25l25655e", 0xc22619, 0, 64 << 10, 512, 0) }, + /* Micron */ + { INFO("n25q128a11", 0x20bb18, 0, 64 << 10, 256, 0) }, + { INFO("n25q128a13", 0x20ba18, 0, 64 << 10, 256, 0) }, + { INFO("n25q256a", 0x20ba19, 0, 64 << 10, 512, ER_4K) }, + /* Spansion -- single (large) sector size only, at least * for the chips listed here (without boot sectors). */ - { INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) }, - { INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) }, - { INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) }, - { INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) }, { INFO("s25sl032p", 0x010215, 0x4d00, 64 << 10, 64, ER_4K) }, - { INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) }, + { INFO("s25sl064p", 0x010216, 0x4d00, 64 << 10, 128, ER_4K) }, { INFO("s25fl256s0", 0x010219, 0x4d00, 256 << 10, 128, 0) }, { INFO("s25fl256s1", 0x010219, 0x4d01, 64 << 10, 512, 0) }, { INFO("s25fl512s", 0x010220, 0x4d00, 256 << 10, 256, 0) }, @@ -130,6 +140,11 @@ static const FlashPartInfo known_devices[] = { { INFO("s25sl12801", 0x012018, 0x0301, 64 << 10, 256, 0) }, { INFO("s25fl129p0", 0x012018, 0x4d00, 256 << 10, 64, 0) }, { INFO("s25fl129p1", 0x012018, 0x4d01, 64 << 10, 256, 0) }, + { INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) }, + { INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) }, + { INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) }, + { INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) }, + { INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) }, { INFO("s25fl016k", 0xef4015, 0, 64 << 10, 32, ER_4K | ER_32K) }, { INFO("s25fl064k", 0xef4017, 0, 64 << 10, 128, ER_4K | ER_32K) }, @@ -153,11 +168,13 @@ static const FlashPartInfo known_devices[] = { { INFO("m25p32", 0x202016, 0, 64 << 10, 64, 0) }, { INFO("m25p64", 0x202017, 0, 64 << 10, 128, 0) }, { INFO("m25p128", 0x202018, 0, 256 << 10, 64, 0) }, + { INFO("n25q032", 0x20ba16, 0, 64 << 10, 64, 0) }, { INFO("m45pe10", 0x204011, 0, 64 << 10, 2, 0) }, { INFO("m45pe80", 0x204014, 0, 64 << 10, 16, 0) }, { INFO("m45pe16", 0x204015, 0, 64 << 10, 32, 0) }, + { INFO("m25pe20", 0x208012, 0, 64 << 10, 4, 0) }, { INFO("m25pe80", 0x208014, 0, 64 << 10, 16, 0) }, { INFO("m25pe16", 0x208015, 0, 64 << 10, 32, ER_4K) }, @@ -174,8 +191,12 @@ static const FlashPartInfo known_devices[] = { { INFO("w25x16", 0xef3015, 0, 64 << 10, 32, ER_4K) }, { INFO("w25x32", 0xef3016, 0, 64 << 10, 64, ER_4K) }, { INFO("w25q32", 0xef4016, 0, 64 << 10, 64, ER_4K) }, + { INFO("w25q32dw", 0xef6016, 0, 64 << 10, 64, ER_4K) }, { INFO("w25x64", 0xef3017, 0, 64 << 10, 128, ER_4K) }, { INFO("w25q64", 0xef4017, 0, 64 << 10, 128, ER_4K) }, + { INFO("w25q80", 0xef5014, 0, 64 << 10, 16, ER_4K) }, + { INFO("w25q80bl", 0xef4014, 0, 64 << 10, 16, ER_4K) }, + { INFO("w25q256", 0xef4019, 0, 64 << 10, 512, ER_4K) }, /* Numonyx -- n25q128 */ { INFO("n25q128", 0x20ba18, 0, 64 << 10, 256, 0) },