From patchwork Wed Apr 17 07:23:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liguang X-Patchwork-Id: 237157 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E3DE02C0145 for ; Wed, 17 Apr 2013 17:25:31 +1000 (EST) Received: from localhost ([::1]:60171 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1USMkE-00063L-23 for incoming@patchwork.ozlabs.org; Wed, 17 Apr 2013 03:25:30 -0400 Received: from eggs.gnu.org ([208.118.235.92]:58010) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1USMjn-0005x0-EH for qemu-devel@nongnu.org; Wed, 17 Apr 2013 03:25:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1USMjj-0008L2-6g for qemu-devel@nongnu.org; Wed, 17 Apr 2013 03:25:03 -0400 Received: from [222.73.24.84] (port=15875 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1USMji-0007xH-Pi for qemu-devel@nongnu.org; Wed, 17 Apr 2013 03:24:59 -0400 X-IronPort-AV: E=Sophos;i="4.87,491,1363104000"; d="scan'208";a="7075920" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 17 Apr 2013 15:22:00 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id r3H7OeBZ015579; Wed, 17 Apr 2013 15:24:40 +0800 Received: from liguang.fnst.cn.fujitsu.com ([10.167.233.147]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013041715231773-619053 ; Wed, 17 Apr 2013 15:23:17 +0800 From: liguang To: qemu-devel@nongnu.org, seabios@seabios.org Date: Wed, 17 Apr 2013 15:23:00 +0800 Message-Id: <1366183380-24333-2-git-send-email-lig.fnst@cn.fujitsu.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1366183380-24333-1-git-send-email-lig.fnst@cn.fujitsu.com> References: <1366183380-24333-1-git-send-email-lig.fnst@cn.fujitsu.com> X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/04/17 15:23:17, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/04/17 15:23:18, Serialize complete at 2013/04/17 15:23:18 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: liguang Subject: [Qemu-devel] [RFC][PATCH 2/2] hw: add Embedded Controller chip emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org this work implemented Embedded Controller chip emulation which was defined at ACPI SEPC v5 chapter 12: "ACPI Embedded Controller Interface Specification" commonly Embedded Controller will emulate keyboard, mouse, handle ACPI defined operations and some low-speed devices like SMbus. Signed-off-by: liguang --- hw/ec.c | 113 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/ec.h | 20 +++++++++++ 2 files changed, 133 insertions(+), 0 deletions(-) create mode 100644 hw/ec.c create mode 100644 hw/ec.h diff --git a/hw/ec.c b/hw/ec.c new file mode 100644 index 0000000..69c92cf --- /dev/null +++ b/hw/ec.c @@ -0,0 +1,113 @@ +#include "ec.h" +#include "hw/hw.h" +#include "hw/isa/isa.h" +#include "sysemu/sysemu.h" + +#define TYPE_EC_DEV +#define EC_DEV(obj) \ + OBJECT_CHECK(ECState, (obj), TYPE_EC_DEV) + +static char ec_acpi_space[EC_ACPI_SPACE_SIZE] = {0}; + +typedef struct ECState { + ISADevice dev; + char cmd; + char status; + char data; + char irq; + char buf; + MemoryRegion io; +} ECState; + + +static void io62_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) +{ + ECState *s = opaque; + char tmp = val & 0xff; + + if (s->status & EC_ACPI_CMD) { + s->buf = tmp; + s->status &= ~EC_ACPI_CMD; + } else { + if (tmp < EC_ACPI_SPACE_SIZE) { + ec_acpi_space[s->buf] = tmp; + } + } +} + +static uint64_t io62_read(void *opaque, hwaddr addr, unsigned size) +{ + return s->data; +} + +static void io66_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) +{ + ECState *s = opaque; + + s->status = EC_ACPI_CMD | EC_ACPI_IBF; + + switch (val & 0xff) { + case EC_ACPI_CMD_READ: + case EC_ACPI_CMD_WRITE: + case EC_ACPI_CMD_BURST_EN: + s->statu |= EC_ACPI_BST; + case EC_ACPI_CMD_BURST_DN: + s->statu &= ~EC_ACPI_BST; + case EC_ACPI_CMD_QUERY: + s->cmd = val & 0xff; + case default: + break; + } +} + +static uint64_t io66_read(void *opaque, hwaddr addr, unsigned size) +{ + ECState *s = opaque; + + return s->status; +} + +static const MemoryRegionOps io62_io_ops = { + .write = io62_write, + .read = io62_read, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +static const MemoryRegionOps io66_io_ops = { + .write = io66_write, + .read = io66_read, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +static void ec_realizefn(DeviceState *dev, Error **err) +{ + ISADevice *isadev = ISA_DEVICE(dev); + ECState *s = EC_DEV(dev); + + isa_init_irq(isadev, &s->irq, 0xb); + + memory_region_init_io(&s->io, &io62_io_ops, NULL, "ec-acpi-data", 1); + isa_register_ioport(isadev, &s->io, 0x62); + + memory_region_init_io(&s->io, &io66_io_ops, NULL, "ec-acpi-cmd", 1); + isa_register_ioport(isadev, &s->io, 0x66); + + s->status = 0; + s->data = 0; +} + +static void ec_class_initfn(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = ec_realizefn; + dc->no_user = 1; +} diff --git a/hw/ec.h b/hw/ec.h new file mode 100644 index 0000000..110ce04 --- /dev/null +++ b/hw/ec.h @@ -0,0 +1,20 @@ +#inndef __EC_H +#define __EC_H + +#define EC_ACPI_SPACE_SIZE 0x80 + +#define EC_ACPI_CMD_PORT 0x66 +#define EC_ACPI_DATA_PORT 0x62 + +#define EC_ACPI_OBF 0x1 +#define EC_ACPI_IBF 0x2 +#define EC_ACPI_CMD 0x8 +#define EC_ACPI_BST 0x10 + +#define EC_ACPI_CMD_READ 0x80 +#define EC_ACPI_CMD_WRITE 0x81 +#define EC_ACPI_BURST_EN 0x82 +#define EC_ACPI_BURST_DN 0x83 +#define EC_ACPI_CMD_QUERY 0x84 + +#endif