Message ID | 1365580949-32467-1-git-send-email-lig.fnst@cn.fujitsu.com |
---|---|
State | New |
Headers | show |
On Wed, 10 Apr 2013 16:02:28 +0800 liguang <lig.fnst@cn.fujitsu.com> wrote: > we should remove it now, if not, cpu reset > will do 2 times. Currently CPU is bus-less device so there isn't anything to reset it during reboot except callback. This patch will break reboot path, just try guest reboot from inside guest. > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > --- > target-i386/cpu.c | 9 --------- > 1 files changed, 0 insertions(+), 9 deletions(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 356378c..6e13053 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2024,13 +2024,6 @@ bool cpu_is_bsp(X86CPU *cpu) > { > return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP; > } > - > -/* TODO: remove me, when reset over QOM tree is implemented */ > -static void x86_cpu_machine_reset_cb(void *opaque) > -{ > - X86CPU *cpu = opaque; > - cpu_reset(CPU(cpu)); > -} > #endif > > static void mce_init(X86CPU *cpu) > @@ -2140,8 +2133,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error > **errp) } > > #ifndef CONFIG_USER_ONLY > - qemu_register_reset(x86_cpu_machine_reset_cb, cpu); > - > if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) { > x86_cpu_apic_init(cpu, &local_err); > if (local_err != NULL) {
在 2013-04-10三的 10:34 +0200,Igor Mammedov写道: > On Wed, 10 Apr 2013 16:02:28 +0800 > liguang <lig.fnst@cn.fujitsu.com> wrote: > > > we should remove it now, if not, cpu reset > > will do 2 times. > Currently CPU is bus-less device so there isn't anything to reset it during > reboot except callback. > This patch will break reboot path, just try guest reboot from inside guest. Yes, thanks! and, should we care as I found cpu reset will do more than 1 times during boot? > > > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > > --- > > target-i386/cpu.c | 9 --------- > > 1 files changed, 0 insertions(+), 9 deletions(-) > > > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > > index 356378c..6e13053 100644 > > --- a/target-i386/cpu.c > > +++ b/target-i386/cpu.c > > @@ -2024,13 +2024,6 @@ bool cpu_is_bsp(X86CPU *cpu) > > { > > return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP; > > } > > - > > -/* TODO: remove me, when reset over QOM tree is implemented */ > > -static void x86_cpu_machine_reset_cb(void *opaque) > > -{ > > - X86CPU *cpu = opaque; > > - cpu_reset(CPU(cpu)); > > -} > > #endif > > > > static void mce_init(X86CPU *cpu) > > @@ -2140,8 +2133,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error > > **errp) } > > > > #ifndef CONFIG_USER_ONLY > > - qemu_register_reset(x86_cpu_machine_reset_cb, cpu); > > - > > if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) { > > x86_cpu_apic_init(cpu, &local_err); > > if (local_err != NULL) { >
On Wed, 10 Apr 2013 16:52:01 +0800 li guang <lig.fnst@cn.fujitsu.com> wrote: > 在 2013-04-10三的 10:34 +0200,Igor Mammedov写道: > > On Wed, 10 Apr 2013 16:02:28 +0800 > > liguang <lig.fnst@cn.fujitsu.com> wrote: > > > > > we should remove it now, if not, cpu reset > > > will do 2 times. > > Currently CPU is bus-less device so there isn't anything to reset it > > during reboot except callback. > > This patch will break reboot path, just try guest reboot from inside > > guest. > > Yes, thanks! > and, should we care as I found > cpu reset will do more than 1 times > during boot? reset in realize() is fro the sake of hot-plug and it doesn't hurt. Removing callback could be considered once CPU is attached to ICC bus, but I haven't looked in that direction yet. > > > > > > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > > > --- > > > target-i386/cpu.c | 9 --------- > > > 1 files changed, 0 insertions(+), 9 deletions(-) > > > > > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > > > index 356378c..6e13053 100644 > > > --- a/target-i386/cpu.c > > > +++ b/target-i386/cpu.c > > > @@ -2024,13 +2024,6 @@ bool cpu_is_bsp(X86CPU *cpu) > > > { > > > return cpu_get_apic_base(cpu->env.apic_state) & > > > MSR_IA32_APICBASE_BSP; } > > > - > > > -/* TODO: remove me, when reset over QOM tree is implemented */ > > > -static void x86_cpu_machine_reset_cb(void *opaque) > > > -{ > > > - X86CPU *cpu = opaque; > > > - cpu_reset(CPU(cpu)); > > > -} > > > #endif > > > > > > static void mce_init(X86CPU *cpu) > > > @@ -2140,8 +2133,6 @@ static void x86_cpu_realizefn(DeviceState *dev, > > > Error **errp) } > > > > > > #ifndef CONFIG_USER_ONLY > > > - qemu_register_reset(x86_cpu_machine_reset_cb, cpu); > > > - > > > if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) { > > > x86_cpu_apic_init(cpu, &local_err); > > > if (local_err != NULL) { > > > >
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 356378c..6e13053 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2024,13 +2024,6 @@ bool cpu_is_bsp(X86CPU *cpu) { return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP; } - -/* TODO: remove me, when reset over QOM tree is implemented */ -static void x86_cpu_machine_reset_cb(void *opaque) -{ - X86CPU *cpu = opaque; - cpu_reset(CPU(cpu)); -} #endif static void mce_init(X86CPU *cpu) @@ -2140,8 +2133,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } #ifndef CONFIG_USER_ONLY - qemu_register_reset(x86_cpu_machine_reset_cb, cpu); - if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) { x86_cpu_apic_init(cpu, &local_err); if (local_err != NULL) {
we should remove it now, if not, cpu reset will do 2 times. Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> --- target-i386/cpu.c | 9 --------- 1 files changed, 0 insertions(+), 9 deletions(-)