From patchwork Tue Jan 15 08:57:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 212037 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7AFBF2C00A4 for ; Tue, 15 Jan 2013 19:57:40 +1100 (EST) Received: from localhost ([::1]:50530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2Kw-0004rU-Nr for incoming@patchwork.ozlabs.org; Tue, 15 Jan 2013 03:57:38 -0500 Received: from eggs.gnu.org ([208.118.235.92]:49685) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2Kk-0004qH-I7 for qemu-devel@nongnu.org; Tue, 15 Jan 2013 03:57:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tv2Ki-0000eS-4o for qemu-devel@nongnu.org; Tue, 15 Jan 2013 03:57:26 -0500 Received: from mout.web.de ([212.227.17.12]:51387) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tv2Kh-0000eC-Rd; Tue, 15 Jan 2013 03:57:24 -0500 Received: from envy.de ([84.148.54.198]) by smtp.web.de (mrweb103) with ESMTPSA (Nemesis) id 0MBTIY-1TljC004P8-00AWdT; Tue, 15 Jan 2013 09:57:22 +0100 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 15 Jan 2013 09:57:14 +0100 Message-Id: <1358240234-31883-3-git-send-email-andreas.faerber@web.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358240234-31883-1-git-send-email-andreas.faerber@web.de> References: <1358240234-31883-1-git-send-email-andreas.faerber@web.de> MIME-Version: 1.0 X-Provags-ID: V02:K0:+t94dyNutUpOlcwJYlbrEgHnC2LR2dh7d7JBXPmkV8P Mi8tsDboF4h8czjCuUWi9XNcm5saOVK1CeaZgPJQJP3mkKhZDD FBbjoUX6UkXWtx68u/6RW9J5X+P9oAWr5c1vS+hlsWWoHctmrT rRKGs17MfqaJMfX5o2/5CUPKsct4fd9M8ARQaH1ETrSTo2eaZI 6cb0FC9a1M79c/Zoi9ZpQ== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 212.227.17.12 Cc: Blue Swirl , =?UTF-8?q?Andreas=20F=C3=A4rber?= , qemu-ppc@nongnu.org Subject: [Qemu-devel] [PATCH 2/2] pc87312: Avoid define conflict on mingw32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Blue Swirl Mingw32 headers define FAR, causing this warning: /src/qemu/hw/pc87312.c:38:0: warning: "FAR" redefined [enabled by default] In file included from /usr/local/lib/gcc/i686-mingw32msvc/4.7.0/../../../../i686-mingw32msvc/include/windows.h:48:0, from /src/qemu/include/sysemu/os-win32.h:29, from /src/qemu/include/qemu-common.h:46, from /src/qemu/include/exec/ioport.h:27, from /src/qemu/hw/isa.h:6, from /src/qemu/hw/pc87312.h:28, from /src/qemu/hw/pc87312.c:26: /usr/local/lib/gcc/i686-mingw32msvc/4.7.0/../../../../i686-mingw32msvc/include/windef.h:34:0: note: this is the location of the previous definition Avoid the warning by expanding the macros. Signed-off-by: Blue Swirl Acked-by: Hervé Poussineau Signed-off-by: Andreas Färber --- hw/pc87312.c | 38 +++++++++++++++++--------------------- 1 Datei geändert, 17 Zeilen hinzugefügt(+), 21 Zeilen entfernt(-) diff --git a/hw/pc87312.c b/hw/pc87312.c index 97fabfa..38af4c1 100644 --- a/hw/pc87312.c +++ b/hw/pc87312.c @@ -34,10 +34,6 @@ #define REG_FAR 1 #define REG_PTR 2 -#define FER regs[REG_FER] -#define FAR regs[REG_FAR] -#define PTR regs[REG_PTR] - #define FER_PARALLEL_EN 0x01 #define FER_UART1_EN 0x02 #define FER_UART2_EN 0x04 @@ -66,14 +62,14 @@ static inline bool is_parallel_enabled(PC87312State *s) { - return s->FER & FER_PARALLEL_EN; + return s->regs[REG_FER] & FER_PARALLEL_EN; } static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 }; static inline uint32_t get_parallel_iobase(PC87312State *s) { - return parallel_base[s->FAR & FAR_PARALLEL_ADDR]; + return parallel_base[s->regs[REG_FAR] & FAR_PARALLEL_ADDR]; } static const uint32_t parallel_irq[] = { 5, 7, 5, 0 }; @@ -81,9 +77,9 @@ static const uint32_t parallel_irq[] = { 5, 7, 5, 0 }; static inline uint32_t get_parallel_irq(PC87312State *s) { int idx; - idx = (s->FAR & FAR_PARALLEL_ADDR); + idx = (s->regs[REG_FAR] & FAR_PARALLEL_ADDR); if (idx == 0) { - return (s->PTR & PTR_IRQ_5_7) ? 7 : 5; + return (s->regs[REG_PTR] & PTR_IRQ_5_7) ? 7 : 5; } else { return parallel_irq[idx]; } @@ -91,7 +87,7 @@ static inline uint32_t get_parallel_irq(PC87312State *s) static inline bool is_parallel_epp(PC87312State *s) { - return s->PTR & PTR_EPP_MODE; + return s->regs[REG_PTR] & PTR_EPP_MODE; } @@ -105,26 +101,26 @@ static const uint32_t uart_base[2][4] = { static inline uint32_t get_uart_iobase(PC87312State *s, int i) { int idx; - idx = (s->FAR >> (2 * i + 2)) & 0x3; + idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3; if (idx == 0) { return 0x3f8; } else if (idx == 1) { return 0x2f8; } else { - return uart_base[idx & 1][(s->FAR & FAR_UART_3_4) >> 6]; + return uart_base[idx & 1][(s->regs[REG_FAR] & FAR_UART_3_4) >> 6]; } } static inline uint32_t get_uart_irq(PC87312State *s, int i) { int idx; - idx = (s->FAR >> (2 * i + 2)) & 0x3; + idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3; return (idx & 1) ? 3 : 4; } static inline bool is_uart_enabled(PC87312State *s, int i) { - return s->FER & (FER_UART1_EN << i); + return s->regs[REG_FER] & (FER_UART1_EN << i); } @@ -132,12 +128,12 @@ static inline bool is_uart_enabled(PC87312State *s, int i) static inline bool is_fdc_enabled(PC87312State *s) { - return s->FER & FER_FDC_EN; + return s->regs[REG_FER] & FER_FDC_EN; } static inline uint32_t get_fdc_iobase(PC87312State *s) { - return (s->FER & FER_FDC_ADDR) ? 0x370 : 0x3f0; + return (s->regs[REG_FER] & FER_FDC_ADDR) ? 0x370 : 0x3f0; } @@ -145,19 +141,19 @@ static inline uint32_t get_fdc_iobase(PC87312State *s) static inline bool is_ide_enabled(PC87312State *s) { - return s->FER & FER_IDE_EN; + return s->regs[REG_FER] & FER_IDE_EN; } static inline uint32_t get_ide_iobase(PC87312State *s) { - return (s->FER & FER_IDE_ADDR) ? 0x170 : 0x1f0; + return (s->regs[REG_FER] & FER_IDE_ADDR) ? 0x170 : 0x1f0; } static void reconfigure_devices(PC87312State *s) { error_report("pc87312: unsupported device reconfiguration (%02x %02x %02x)", - s->FER, s->FAR, s->PTR); + s->regs[REG_FER], s->regs[REG_FAR], s->regs[REG_PTR]); } static void pc87312_soft_reset(PC87312State *s) @@ -184,9 +180,9 @@ static void pc87312_soft_reset(PC87312State *s) s->read_id_step = 0; s->selected_index = REG_FER; - s->FER = fer_init[s->config & 0x1f]; - s->FAR = far_init[s->config & 0x1f]; - s->PTR = ptr_init[s->config & 0x1f]; + s->regs[REG_FER] = fer_init[s->config & 0x1f]; + s->regs[REG_FAR] = far_init[s->config & 0x1f]; + s->regs[REG_PTR] = ptr_init[s->config & 0x1f]; } static void pc87312_hard_reset(PC87312State *s)