From patchwork Tue Oct 30 00:12:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 195204 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BE71F2C0085 for ; Tue, 30 Oct 2012 11:50:18 +1100 (EST) Received: from localhost ([::1]:34563 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzSO-0000lZ-HY for incoming@patchwork.ozlabs.org; Mon, 29 Oct 2012 20:13:24 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43664) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRR-0007C6-8C for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSzRM-0005CE-Im for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:25 -0400 Received: from hall.aurel32.net ([88.191.126.93]:39641) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRM-0005BW-B0 for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:20 -0400 Received: from 89-92-80-242.hfc.dyn.abo.bbox.fr ([89.92.80.242] helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1TSzRK-0000Qi-Jc; Tue, 30 Oct 2012 01:12:18 +0100 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1TSzRG-0005CW-Mb; Tue, 30 Oct 2012 01:12:14 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Tue, 30 Oct 2012 01:12:07 +0100 Message-Id: <1351555932-19695-15-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351555932-19695-1-git-send-email-aurelien@aurel32.net> References: <1351555932-19695-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 88.191.126.93 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH v2 14/19] target-mips: don't use local temps for store conditional X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Store conditional operations only need local temps in user mode. Fix the code to use temp local only in user mode, this spares two memory stores in system mode. At the same time remove a wrong a wrong copied & pasted comment, store operations don't have a register destination. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-mips/translate.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index b385923..54f309f 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1359,13 +1359,14 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt, const char *opn = "st_cond"; TCGv t0, t1; +#ifdef CONFIG_USER_ONLY t0 = tcg_temp_local_new(); - - gen_base_offset_addr(ctx, t0, base, offset); - /* Don't do NOP if destination is zero: we must perform the actual - memory access. */ - t1 = tcg_temp_local_new(); +#else + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); +#endif + gen_base_offset_addr(ctx, t0, base, offset); gen_load_gpr(t1, rt); switch (opc) { #if defined(TARGET_MIPS64)