From patchwork Tue Oct 30 00:12:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 195203 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0B0B22C0084 for ; Tue, 30 Oct 2012 11:39:21 +1100 (EST) Received: from localhost ([::1]:36959 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzTG-00024S-Ur for incoming@patchwork.ozlabs.org; Mon, 29 Oct 2012 20:14:18 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43610) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRP-00079d-MD for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSzRM-0005BN-1o for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:23 -0400 Received: from hall.aurel32.net ([88.191.126.93]:39632) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRL-0005AH-SP for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:19 -0400 Received: from 89-92-80-242.hfc.dyn.abo.bbox.fr ([89.92.80.242] helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1TSzRK-0000Qg-DI; Tue, 30 Oct 2012 01:12:18 +0100 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1TSzRG-0005CN-GJ; Tue, 30 Oct 2012 01:12:14 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Tue, 30 Oct 2012 01:12:05 +0100 Message-Id: <1351555932-19695-13-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351555932-19695-1-git-send-email-aurelien@aurel32.net> References: <1351555932-19695-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 88.191.126.93 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH v2 12/19] target-mips: simplify load/store microMIPS helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org load/store microMIPS helpers are reinventing the wheel. Call do_lw, do_ll, do_sw and do_sl instead of using a macro calling the cpu_* load/store functions. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-mips/op_helper.c | 73 ++++++----------------------------------------- 1 file changed, 9 insertions(+), 64 deletions(-) diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index a7509ca..78497d9 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -594,32 +594,19 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, { target_ulong base_reglist = reglist & 0xf; target_ulong do_r31 = reglist & 0x10; -#ifdef CONFIG_USER_ONLY -#undef ldfun -#define ldfun(env, addr) ldl_raw(addr) -#else - uint32_t (*ldfun)(CPUMIPSState *env, target_ulong); - - switch (mem_idx) - { - case 0: ldfun = cpu_ldl_kernel; break; - case 1: ldfun = cpu_ldl_super; break; - default: - case 2: ldfun = cpu_ldl_user; break; - } -#endif if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) { target_ulong i; for (i = 0; i < base_reglist; i++) { - env->active_tc.gpr[multiple_regs[i]] = (target_long)ldfun(env, addr); + env->active_tc.gpr[multiple_regs[i]] = + (target_long)do_lw(env, addr, mem_idx); addr += 4; } } if (do_r31) { - env->active_tc.gpr[31] = (target_long)ldfun(env, addr); + env->active_tc.gpr[31] = (target_long)do_lw(env, addr, mem_idx); } } @@ -628,32 +615,18 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, { target_ulong base_reglist = reglist & 0xf; target_ulong do_r31 = reglist & 0x10; -#ifdef CONFIG_USER_ONLY -#undef stfun -#define stfun(env, addr, val) stl_raw(addr, val) -#else - void (*stfun)(CPUMIPSState *env, target_ulong, uint32_t); - - switch (mem_idx) - { - case 0: stfun = cpu_stl_kernel; break; - case 1: stfun = cpu_stl_super; break; - default: - case 2: stfun = cpu_stl_user; break; - } -#endif if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) { target_ulong i; for (i = 0; i < base_reglist; i++) { - stfun(env, addr, env->active_tc.gpr[multiple_regs[i]]); + do_sw(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx); addr += 4; } } if (do_r31) { - stfun(env, addr, env->active_tc.gpr[31]); + do_sw(env, addr, env->active_tc.gpr[31], mem_idx); } } @@ -663,32 +636,18 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, { target_ulong base_reglist = reglist & 0xf; target_ulong do_r31 = reglist & 0x10; -#ifdef CONFIG_USER_ONLY -#undef ldfun -#define ldfun(env, addr) ldq_raw(addr) -#else - uint64_t (*ldfun)(CPUMIPSState *env, target_ulong); - - switch (mem_idx) - { - case 0: ldfun = cpu_ldq_kernel; break; - case 1: ldfun = cpu_ldq_super; break; - default: - case 2: ldfun = cpu_ldq_user; break; - } -#endif if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) { target_ulong i; for (i = 0; i < base_reglist; i++) { - env->active_tc.gpr[multiple_regs[i]] = ldfun(env, addr); + env->active_tc.gpr[multiple_regs[i]] = do_ld(env, addr, mem_idx); addr += 8; } } if (do_r31) { - env->active_tc.gpr[31] = ldfun(env, addr); + env->active_tc.gpr[31] = do_ld(env, addr, mem_idx); } } @@ -697,32 +656,18 @@ void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, { target_ulong base_reglist = reglist & 0xf; target_ulong do_r31 = reglist & 0x10; -#ifdef CONFIG_USER_ONLY -#undef stfun -#define stfun(env, addr, val) stq_raw(addr, val) -#else - void (*stfun)(CPUMIPSState *env, target_ulong, uint64_t); - - switch (mem_idx) - { - case 0: stfun = cpu_stq_kernel; break; - case 1: stfun = cpu_stq_super; break; - default: - case 2: stfun = cpu_stq_user; break; - } -#endif if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) { target_ulong i; for (i = 0; i < base_reglist; i++) { - stfun(env, addr, env->active_tc.gpr[multiple_regs[i]]); + do_sd(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx); addr += 8; } } if (do_r31) { - stfun(env, addr, env->active_tc.gpr[31]); + do_sd(env, addr, env->active_tc.gpr[31], mem_idx); } } #endif