From patchwork Tue Oct 9 19:56:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 190439 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A71CE2C00A6 for ; Wed, 10 Oct 2012 07:41:58 +1100 (EST) Received: from localhost ([::1]:47781 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLfwG-0001ov-KU for incoming@patchwork.ozlabs.org; Tue, 09 Oct 2012 15:58:00 -0400 Received: from eggs.gnu.org ([208.118.235.92]:39457) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLfus-0008Cz-I4 for qemu-devel@nongnu.org; Tue, 09 Oct 2012 15:56:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLfup-0004Yu-A3 for qemu-devel@nongnu.org; Tue, 09 Oct 2012 15:56:34 -0400 Received: from hall.aurel32.net ([88.191.126.93]:55991) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLfuo-0004Vj-8r for qemu-devel@nongnu.org; Tue, 09 Oct 2012 15:56:31 -0400 Received: from watt.aurel32.net ([82.228.202.134] helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1TLful-0005Jc-KF; Tue, 09 Oct 2012 21:56:28 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1TLfuk-0005A4-3O; Tue, 09 Oct 2012 21:56:26 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Tue, 9 Oct 2012 21:56:11 +0200 Message-Id: <1349812584-19551-14-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1349812584-19551-1-git-send-email-aurelien@aurel32.net> References: <1349812584-19551-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 88.191.126.93 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH v2 13/26] tcg: synchronize globals for ops with side effects X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Operations with side effects (in practice qemu_ld/st ops), only need to synchronize globals to make sure the CPU state is consistent in case of exception. Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- tcg/tcg.c | 33 ++++++++++++++++++++++++--------- tcg/tcg.h | 4 ++-- 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 3983ec3..3f30fb1 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1360,9 +1360,8 @@ static void tcg_liveness_analysis(TCGContext *s) /* if end of basic block, update */ if (def->flags & TCG_OPF_BB_END) { tcg_la_bb_end(s, dead_temps, mem_temps); - } else if (def->flags & TCG_OPF_CALL_CLOBBER) { - /* globals should go back to memory */ - memset(dead_temps, 1, s->nb_globals); + } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { + /* globals should be synced to memory */ memset(mem_temps, 1, s->nb_globals); } @@ -1623,6 +1622,23 @@ static void save_globals(TCGContext *s, TCGRegSet allocated_regs) } } +/* sync globals to their canonical location and assume they can be + read by the following code. 'allocated_regs' is used in case a + temporary registers needs to be allocated to store a constant. */ +static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) +{ + int i; + + for (i = 0; i < s->nb_globals; i++) { +#ifdef USE_LIVENESS_ANALYSIS + assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || + s->temps[i].mem_coherent); +#else + temp_sync(s, i, allocated_regs); +#endif + } +} + /* at the end of a basic block, we assume all temporaries are dead and all globals are stored at their canonical location. */ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) @@ -1860,12 +1876,11 @@ static void tcg_reg_alloc_op(TCGContext *s, tcg_reg_free(s, reg); } } - /* XXX: for load/store we could do that only for the slow path - (i.e. when a memory callback is called) */ - - /* store globals and free associated registers (we assume the insn - can modify any global. */ - save_globals(s, allocated_regs); + } + if (def->flags & TCG_OPF_SIDE_EFFECTS) { + /* sync globals if the op has side effects and might trigger + an exception. */ + sync_globals(s, allocated_regs); } /* satisfy the output constraints */ diff --git a/tcg/tcg.h b/tcg/tcg.h index 73d3769..fb6d9ea 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -530,8 +530,8 @@ enum { TCG_OPF_BB_END = 0x01, /* Instruction clobbers call registers and potentially update globals. */ TCG_OPF_CALL_CLOBBER = 0x02, - /* Instruction has side effects: it cannot be removed - if its outputs are not used. */ + /* Instruction has side effects: it cannot be removed if its outputs + are not used, and might trigger exceptions. */ TCG_OPF_SIDE_EFFECTS = 0x04, /* Instruction operands are 64-bits (otherwise 32-bits). */ TCG_OPF_64BIT = 0x08,