From patchwork Mon Oct 1 18:54:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 188333 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6082A2C00ED for ; Tue, 2 Oct 2012 04:54:34 +1000 (EST) Received: from localhost ([::1]:48013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TIl8S-0007hO-5J for incoming@patchwork.ozlabs.org; Mon, 01 Oct 2012 14:54:32 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50196) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TIl8H-0007hE-PM for qemu-devel@nongnu.org; Mon, 01 Oct 2012 14:54:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TIl8G-0007Jp-Jn for qemu-devel@nongnu.org; Mon, 01 Oct 2012 14:54:21 -0400 Received: from hall.aurel32.net ([88.191.126.93]:47993) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TIl8G-0007J8-DS for qemu-devel@nongnu.org; Mon, 01 Oct 2012 14:54:20 -0400 Received: from [2001:470:d4ed:1:2db:dfff:fe14:52d] (helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1TIl8E-0001dj-C4; Mon, 01 Oct 2012 20:54:18 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1TIl8C-00053D-PQ; Mon, 01 Oct 2012 20:54:16 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Mon, 1 Oct 2012 20:54:13 +0200 Message-Id: <1349117653-19380-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 88.191.126.93 Cc: Max Filippov , Aurelien Jarno Subject: [Qemu-devel] [PATCH v2] target-xtensa: de-optimize EXTUI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Now that "and" with 0xff, 0xffff and 0xffffffff and "shr" with 0 shift are optimized in tcg/tcg-op.h there is no need to do it in target-xtensa/translate.c. Cc: Max Filippov Signed-off-by: Aurelien Jarno Acked-by: Max Filippov --- target-xtensa/translate.c | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) v1 -> v2: also remove the test on shiftimm to select either a shift or a move. diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index b9acd70..82e8ccc 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -1829,26 +1829,8 @@ static void disas_xtensa_insn(DisasContext *dc) int maskimm = (1 << (OP2 + 1)) - 1; TCGv_i32 tmp = tcg_temp_new_i32(); - - if (shiftimm) { - tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm); - } else { - tcg_gen_mov_i32(tmp, cpu_R[RRR_T]); - } - - switch (maskimm) { - case 0xff: - tcg_gen_ext8u_i32(cpu_R[RRR_R], tmp); - break; - - case 0xffff: - tcg_gen_ext16u_i32(cpu_R[RRR_R], tmp); - break; - - default: - tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); - break; - } + tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm); + tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); tcg_temp_free(tmp); } break;