From patchwork Fri Sep 28 00:07:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187595 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 431132C00D9 for ; Fri, 28 Sep 2012 10:07:33 +1000 (EST) Received: from localhost ([::1]:44635 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THO79-0008HX-9i for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 20:07:31 -0400 Received: from eggs.gnu.org ([208.118.235.92]:33785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THO70-0008CZ-Dc for qemu-devel@nongnu.org; Thu, 27 Sep 2012 20:07:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THO6y-0006UC-Ii for qemu-devel@nongnu.org; Thu, 27 Sep 2012 20:07:22 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:46049) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THO6y-0006U4-Ct for qemu-devel@nongnu.org; Thu, 27 Sep 2012 20:07:20 -0400 Received: by padfb10 with SMTP id fb10so1783303pad.4 for ; Thu, 27 Sep 2012 17:07:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=+PuH90o0oOzf2lzvC1IDGQtW7ePSJzQ+DIMSjPTlfWE=; b=Suw7DKyYO/DOQ6njsx4toxHS4+wRWnvQUOM16p6+d+B2bzn3rF3SSK9YvYelocpYgQ VNKOuGDe2Ni5TvXfUULAEpqpFviolUJ2h91KKm5aFAjxwXYr69TjX85/qmf6tEXom3Mn ji/KRPdVQr0mR+Hf4Nzm2YxyKtMOGuRE70y74XSchNnjhRUX+JFtY/l8YzLivAr7fwLR gSsMNaCkExC/r5lltFR/ExOc9W6flcIdN0NWmc1oPvwlEPeV3LSgx5oTcIIizTYAqOzB wxIq9NCkeckueJz8O9CMgY3+2YmIAbjQzzdEQhEX5xFYgHo/7M2byZcL2RC9IngvRUaq 5k6w== Received: by 10.66.74.201 with SMTP id w9mr13094184pav.74.1348790839823; Thu, 27 Sep 2012 17:07:19 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id pi1sm4593317pbb.7.2012.09.27.17.07.18 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 17:07:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Sep 2012 17:07:16 -0700 Message-Id: <1348790836-25862-1-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348785610-23418-1-git-send-email-rth@twiddle.net> References: <1348785610-23418-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.220.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 074/147] target-s390: Convert STORE REVERSED X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 34 ++++++++++++++++++++++++---------- 2 files changed, 28 insertions(+), 10 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 1ee0d42..fa3ee00 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -420,6 +420,10 @@ C(0xe370, STHY, RXY_a, LD, r1_o, a2, 0, 0, st16, 0) /* STORE HALFWORD RELATIVE LONG */ C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0) +/* STORE REVERSED */ + C(0xe33f, STRVH, RXY_a, Z, la2, r1_16u, new, m1_16, rev16, 0) + C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0) + C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0) /* STORE FPC */ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 468c8ea..4757713 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1005,7 +1005,6 @@ static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1, int x2, int b2, int d2) { TCGv_i64 addr, tmp2; - TCGv_i32 tmp32_1; LOG_DISAS("disas_e3: op 0x%x r1 %d x2 %d b2 %d d2 %d\n", op, r1, x2, b2, d2); @@ -1018,15 +1017,6 @@ static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1, store_reg(r1, tmp2); tcg_temp_free_i64(tmp2); break; - case 0x3e: /* STRV R1,D2(X2,B2) [RXY] */ - tmp32_1 = load_reg32(r1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_bswap32_i32(tmp32_1, tmp32_1); - tcg_gen_extu_i32_i64(tmp2, tmp32_1); - tcg_temp_free_i32(tmp32_1); - tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); - tcg_temp_free_i64(tmp2); - break; default: LOG_DISAS("illegal e3 operation 0x%x\n", op); gen_illegal_opcode(s); @@ -3738,6 +3728,12 @@ static void in1_la1(DisasContext *s, DisasFields *f, DisasOps *o) o->addr1 = get_address(s, 0, get_field(f, b1), get_field(f, d1)); } +static void in1_la2(DisasContext *s, DisasFields *f, DisasOps *o) +{ + int x2 = have_field(f, x2) ? get_field(f, x2) : 0; + o->addr1 = get_address(s, x2, get_field(f, b2), get_field(f, d2)); +} + static void in1_m1_8u(DisasContext *s, DisasFields *f, DisasOps *o) { in1_la1(s, f, o); @@ -3783,6 +3779,24 @@ static void in1_m1_64(DisasContext *s, DisasFields *f, DisasOps *o) /* ====================================================================== */ /* The "INput 2" generators. These load the second operand to an insn. */ +static void in2_r1_o(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = regs[get_field(f, r1)]; + o->g_in2 = true; +} + +static void in2_r1_16u(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = tcg_temp_new_i64(); + tcg_gen_ext16u_i64(o->in2, regs[get_field(f, r1)]); +} + +static void in2_r1_32u(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = tcg_temp_new_i64(); + tcg_gen_ext32u_i64(o->in2, regs[get_field(f, r1)]); +} + static void in2_r2(DisasContext *s, DisasFields *f, DisasOps *o) { o->in2 = load_reg(get_field(f, r2));