From patchwork Thu Sep 27 23:49:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EDD122C00AC for ; Fri, 28 Sep 2012 09:49:28 +1000 (EST) Received: from localhost ([::1]:36003 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNpf-000100-58 for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 19:49:27 -0400 Received: from eggs.gnu.org ([208.118.235.92]:35123) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNpV-0000z8-67 for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:49:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THNpU-0008Sj-5G for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:49:17 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:62832) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNpT-0008Sf-VB for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:49:16 -0400 Received: by padfb10 with SMTP id fb10so1773817pad.4 for ; Thu, 27 Sep 2012 16:49:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=G9+qp5oDe0JIipumBxvn6+dc1ZSZMRX2kAcUG3FIH3E=; b=RxGrcSf+zVgHAUDjO6M0hJnsVVNZs9Bi0I2Q9Ds4d0CL1fDkNG1q3SYXSqHISwxR9L kY8hLrtiE8skcQW7d6zqgU3i8IE0IC6ALtLOPNg6ShyGSvRI4VGD/Aqqi7MPun8XuLL8 olP0w2DkK6vRrpsbyimbdUclVPfGAkNRLDWufqvT1ysGyTV1quMlKRf8aHqfx6HZIVew kjoBR667JfcBSir6bWIDeICEy+pIESnFfw4n8ecpiVtwPK0x1lyURyBN6FgIF8AUAUHX 6XmvyoqEWzCDLYuaI/bOWGzu34jc12scR0gFNgL+ntxlqrhffLUZLhS1FflWibVny/7t U0ig== Received: by 10.66.88.3 with SMTP id bc3mr13188674pab.51.1348789755242; Thu, 27 Sep 2012 16:49:15 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id y11sm4555818pbv.66.2012.09.27.16.49.14 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 16:49:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Sep 2012 16:49:11 -0700 Message-Id: <1348789751-25103-1-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348785610-23418-1-git-send-email-rth@twiddle.net> References: <1348785610-23418-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.220.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 057/147] target-s390: Convert STNSM, STOSM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 43 +++++++++++++++++++++++++------------------ 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 2383a36..9859b3b 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -444,4 +444,8 @@ C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0) /* SET SYSTEM MASK */ C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0) +/* STORE THEN AND SYSTEM MASK */ + C(0xac00, STNSM, SI, Z, la1, 0, 0, 0, stnosm, 0) +/* STORE THEN OR SYSTEM MASK */ + C(0xad00, STOSM, SI, Z, la1, 0, 0, 0, stnosm, 0) #endif /* CONFIG_USER_ONLY */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 331580f..3cca318 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2226,7 +2226,7 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) TCGv_i32 tmp32_1, tmp32_2; unsigned char opc; uint64_t insn; - int op, r1, r2, r3, d1, d2, x2, b1, b2, i2, r1b; + int op, r1, r2, r3, d1, d2, x2, b1, b2, r1b; TCGv_i32 vl; opc = cpu_ldub_code(env, s->pc); @@ -2284,23 +2284,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) tcg_temp_free_i32(tmp32_2); break; #ifndef CONFIG_USER_ONLY - case 0xac: /* STNSM D1(B1),I2 [SI] */ - case 0xad: /* STOSM D1(B1),I2 [SI] */ - check_privileged(s); - insn = ld_code4(env, s->pc); - tmp = decode_si(s, insn, &i2, &b1, &d1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_shri_i64(tmp2, psw_mask, 56); - tcg_gen_qemu_st8(tmp2, tmp, get_mem_index(s)); - if (opc == 0xac) { - tcg_gen_andi_i64(psw_mask, psw_mask, - ((uint64_t)i2 << 56) | 0x00ffffffffffffffULL); - } else { - tcg_gen_ori_i64(psw_mask, psw_mask, (uint64_t)i2 << 56); - } - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - break; case 0xae: /* SIGP R1,R3,D2(B2) [RS] */ check_privileged(s); insn = ld_code4(env, s->pc); @@ -3485,6 +3468,30 @@ static ExitStatus op_ssm(DisasContext *s, DisasOps *o) tcg_gen_deposit_i64(psw_mask, psw_mask, o->in2, 56, 8); return NO_EXIT; } + +static ExitStatus op_stnosm(DisasContext *s, DisasOps *o) +{ + uint64_t i2 = get_field(s->fields, i2); + TCGv_i64 t; + + check_privileged(s); + + /* It is important to do what the instruction name says: STORE THEN. + If we let the output hook perform the store then if we fault and + restart, we'll have the wrong SYSTEM MASK in place. */ + t = tcg_temp_new_i64(); + tcg_gen_shri_i64(t, psw_mask, 56); + tcg_gen_qemu_st8(t, o->addr1, get_mem_index(s)); + tcg_temp_free_i64(t); + + if (s->fields->op == 0xac) { + tcg_gen_andi_i64(psw_mask, psw_mask, + (i2 << 56) | 0x00ffffffffffffffull); + } else { + tcg_gen_ori_i64(psw_mask, psw_mask, i2 << 56); + } + return NO_EXIT; +} #endif static ExitStatus op_st8(DisasContext *s, DisasOps *o)