From patchwork Fri Sep 21 17:13:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 185854 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4D24B2C007B for ; Sat, 22 Sep 2012 03:20:39 +1000 (EST) Received: from localhost ([::1]:42867 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TF6oi-0007X1-HP for incoming@patchwork.ozlabs.org; Fri, 21 Sep 2012 13:15:04 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40540) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TF6o9-00069e-Ef for qemu-devel@nongnu.org; Fri, 21 Sep 2012 13:14:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TF6o5-0003PH-AC for qemu-devel@nongnu.org; Fri, 21 Sep 2012 13:14:29 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:63654) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TF6o5-0003ML-43 for qemu-devel@nongnu.org; Fri, 21 Sep 2012 13:14:25 -0400 Received: by mail-pa0-f45.google.com with SMTP id fb10so508839pad.4 for ; Fri, 21 Sep 2012 10:14:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=1bSlBhG2qLWFGT6rn1ewJmrmYpn4BrfVYJ2L9EZW0Oc=; b=zYhXIjmiQgFGU0bHpzHiBzVVsNPApbjg013jspzqDz2GFUeCz7E7SXDTWMeaZL9m55 fEkorEvXmC/pSdNb0xkEZ6K+WBXFqthJBIO0OlMZjGf89oM1EPVIjxOaTEcJfld4TIUa Hr/68BFichtuEyi0kBIj+E0b0I+GxV8Ix4gz6AiQFfYcBuSqP3gQuBFbIfbzh9EEcKYx IzoiW9kvE+OCE9k4S4XJUz0rPyGaKVjTS6ihCddwBaks+KJCEKOTN3/7kp32DYRS7oXz /k611qzxTaHV5tygyq0BOp8ozaYNWl0cP6UxBB8mZ+fz6hef1XCzuMQoVxkfQNhSQqv5 w0HA== Received: by 10.66.83.234 with SMTP id t10mr14813155pay.39.1348247664740; Fri, 21 Sep 2012 10:14:24 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id gf8sm5389723pbc.52.2012.09.21.10.14.23 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Sep 2012 10:14:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 21 Sep 2012 10:13:39 -0700 Message-Id: <1348247620-12734-7-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348247620-12734-1-git-send-email-rth@twiddle.net> References: <1348247620-12734-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.220.45 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH 6/7] tcg: Streamline movcond_i64 using 32-bit arithmetic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Avoiding 64-bit arithmetic (outside of the compare) reduces the generated op count from 15 to 12, and the generated code size on i686 from 105 to 88 bytes. Signed-off-by: Richard Henderson Reviewed-by: Aurelien Jarno --- tcg/tcg-op.h | 42 +++++++++++++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 11 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 6d28f82..3e375ea 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -2141,18 +2141,38 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2) { - if (TCG_TARGET_HAS_movcond_i64) { - tcg_gen_op6i_i64(INDEX_op_movcond_i64, ret, c1, c2, v1, v2, cond); + if (TCG_TARGET_REG_BITS == 32) { + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t1 = tcg_temp_new_i32(); + tcg_gen_op6i_i32(INDEX_op_setcond2_i32, t0, + TCGV_LOW(c1), TCGV_HIGH(c1), + TCGV_LOW(c2), TCGV_HIGH(c2), cond); + tcg_gen_neg_i32(t0, t0); + + tcg_gen_and_i32(t1, TCGV_LOW(v1), t0); + tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(v2), t0); + tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t1); + + tcg_gen_and_i32(t1, TCGV_HIGH(v1), t0); + tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(v2), t0); + tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t1); + + tcg_temp_free_i32(t0); + tcg_temp_free_i32(t1); } else { - TCGv_i64 t0 = tcg_temp_new_i64(); - TCGv_i64 t1 = tcg_temp_new_i64(); - tcg_gen_setcond_i64(cond, t0, c1, c2); - tcg_gen_neg_i64(t0, t0); - tcg_gen_and_i64(t1, v1, t0); - tcg_gen_andc_i64(ret, v2, t0); - tcg_gen_or_i64(ret, ret, t1); - tcg_temp_free_i64(t0); - tcg_temp_free_i64(t1); + if (TCG_TARGET_HAS_movcond_i64) { + tcg_gen_op6i_i64(INDEX_op_movcond_i64, ret, c1, c2, v1, v2, cond); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + tcg_gen_setcond_i64(cond, t0, c1, c2); + tcg_gen_neg_i64(t0, t0); + tcg_gen_and_i64(t1, v1, t0); + tcg_gen_andc_i64(ret, v2, t0); + tcg_gen_or_i64(ret, ret, t1); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + } } }