From patchwork Mon Sep 17 21:35:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 184564 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0EA832C007F for ; Tue, 18 Sep 2012 08:01:11 +1000 (EST) Received: from localhost ([::1]:55817 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDizA-0002YP-KD for incoming@patchwork.ozlabs.org; Mon, 17 Sep 2012 17:36:08 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50037) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDiya-0001Jq-CE for qemu-devel@nongnu.org; Mon, 17 Sep 2012 17:35:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDiyY-0006z7-I5 for qemu-devel@nongnu.org; Mon, 17 Sep 2012 17:35:32 -0400 Received: from mail-qc0-f173.google.com ([209.85.216.173]:46395) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDiyY-0006xr-EL for qemu-devel@nongnu.org; Mon, 17 Sep 2012 17:35:30 -0400 Received: by mail-qc0-f173.google.com with SMTP id b12so5161499qca.4 for ; Mon, 17 Sep 2012 14:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=A+XAYhP0tghepAWwXSiTYF2NuOj9ihrKAijSWQQ3pnk=; b=yC7LNOPvDaFxtMw3BXQw/kn0odFa1YZXGE/yDLybVuQC75ODojAGqemqqd0qg6ybw3 ZNAeGWU40FZV6CIAis8eyU08V6PMZP6tkRHMK3g28zr/BjP4ec/ZdXFV/w2wMslLwX05 Eb5C5h8ksv/CU/j8GMizQ7kWIqdBjLdMRkeG1/VwVB6NKH15cbLtLoboxSxOAaF1v8vM EmjGNXXRdzqWg19lAPJonhYFMmbtD08hq5dCbcpBUs9PvQpRWakQl/hFjznZfdU0WTlJ qPaqQi9ETtlYKrDjsgDq3fRPCNlN4gxXiY4Gb6/CGuQ8UNOzkbarjCTdSYKjMclOEhYp 4z+A== Received: by 10.224.1.69 with SMTP id 5mr30407238qae.61.1347917730218; Mon, 17 Sep 2012 14:35:30 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id h8sm16725178qap.16.2012.09.17.14.35.29 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 17 Sep 2012 14:35:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 17 Sep 2012 14:35:12 -0700 Message-Id: <1347917713-23343-7-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347917713-23343-1-git-send-email-rth@twiddle.net> References: <1347917713-23343-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.216.173 Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 6/7] target-mips: Add accessors for the two 32-bit halves of a 64-bit FPR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Not much used yet, but more users to come. Signed-off-by: Richard Henderson --- target-mips/translate.c | 64 +++++++++++++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 26 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index df92cec..57454f0 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -754,6 +754,24 @@ static void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg) } } +static void gen_load_fpr_pair(DisasContext *ctx, TCGv_i32 tl, + TCGv_i32 th, int reg) +{ + gen_load_fpr32(ctx, tl, reg); + gen_load_fpr32h(ctx, th, reg); +} + +static void gen_store_fpr_pair(DisasContext *ctx, TCGv_i32 tl, + TCGv_i32 th, int reg) +{ + if (ctx->hflags & MIPS_HFLAG_F64) { + tcg_gen_concat_i32_i64(fpu_f64[reg], tl, th); + } else { + tcg_gen_mov_i32(fpu_f32[reg], tl); + tcg_gen_mov_i32(fpu_fh32[reg], th); + } +} + static inline int get_fp_bit (int cc) { if (cc) @@ -7671,8 +7689,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, gen_load_fpr32(ctx, fp0, fs); gen_load_fpr32(ctx, fp1, ft); - gen_store_fpr32h(ctx, fp0, fd); - gen_store_fpr32(ctx, fp1, fd); + gen_store_fpr_pair(ctx, fp1, fp0, fd); tcg_temp_free_i32(fp0); tcg_temp_free_i32(fp1); } @@ -7686,8 +7703,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, gen_load_fpr32(ctx, fp0, fs); gen_load_fpr32h(ctx, fp1, ft); - gen_store_fpr32(ctx, fp1, fd); - gen_store_fpr32h(ctx, fp0, fd); + gen_store_fpr_pair(ctx, fp1, fp0, fd); tcg_temp_free_i32(fp0); tcg_temp_free_i32(fp1); } @@ -7701,8 +7717,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, gen_load_fpr32h(ctx, fp0, fs); gen_load_fpr32(ctx, fp1, ft); - gen_store_fpr32(ctx, fp1, fd); - gen_store_fpr32h(ctx, fp0, fd); + gen_store_fpr_pair(ctx, fp1, fp0, fd); tcg_temp_free_i32(fp0); tcg_temp_free_i32(fp1); } @@ -7716,8 +7731,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, gen_load_fpr32h(ctx, fp0, fs); gen_load_fpr32h(ctx, fp1, ft); - gen_store_fpr32(ctx, fp1, fd); - gen_store_fpr32h(ctx, fp0, fd); + gen_store_fpr_pair(ctx, fp1, fp0, fd); tcg_temp_free_i32(fp0); tcg_temp_free_i32(fp1); } @@ -7877,8 +7891,7 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc, check_cp1_64bitmode(ctx); { TCGv t0 = tcg_temp_local_new(); - TCGv_i32 fp = tcg_temp_new_i32(); - TCGv_i32 fph = tcg_temp_new_i32(); + TCGv_i32 fp, fph; int l1 = gen_new_label(); int l2 = gen_new_label(); @@ -7886,28 +7899,27 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc, tcg_gen_andi_tl(t0, t0, 0x7); tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1); - gen_load_fpr32(ctx, fp, fs); - gen_load_fpr32h(ctx, fph, fs); - gen_store_fpr32(ctx, fp, fd); - gen_store_fpr32h(ctx, fph, fd); + + fp = tcg_temp_new_i32(); + fph = tcg_temp_new_i32(); + gen_load_fpr_pair(ctx, fp, fph, fs); + gen_store_fpr_pair(ctx, fp, fph, fd); + tcg_temp_free_i32(fp); + tcg_temp_free_i32(fph); tcg_gen_br(l2); + gen_set_label(l1); tcg_gen_brcondi_tl(TCG_COND_NE, t0, 4, l2); tcg_temp_free(t0); -#ifdef TARGET_WORDS_BIGENDIAN - gen_load_fpr32(ctx, fp, fs); - gen_load_fpr32h(ctx, fph, ft); - gen_store_fpr32h(ctx, fp, fd); - gen_store_fpr32(ctx, fph, fd); -#else - gen_load_fpr32h(ctx, fph, fs); - gen_load_fpr32(ctx, fp, ft); - gen_store_fpr32(ctx, fph, fd); - gen_store_fpr32h(ctx, fp, fd); -#endif - gen_set_label(l2); + + fp = tcg_temp_new_i32(); + fph = tcg_temp_new_i32(); + gen_load_fpr_pair(ctx, fp, fph, fs); + gen_store_fpr_pair(ctx, fph, fp, fd); tcg_temp_free_i32(fp); tcg_temp_free_i32(fph); + + gen_set_label(l2); } opn = "alnv.ps"; break;