From patchwork Mon Sep 17 15:28:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 184481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 378162C0082 for ; Tue, 18 Sep 2012 01:53:10 +1000 (EST) Received: from localhost ([::1]:33191 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDdGv-0006La-Gn for incoming@patchwork.ozlabs.org; Mon, 17 Sep 2012 11:30:05 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40344) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDdGC-0004t4-VY for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDdG3-0005kl-2a for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:20 -0400 Received: from mail-qc0-f173.google.com ([209.85.216.173]:61421) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDdG2-0005hd-UZ for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:10 -0400 Received: by mail-qc0-f173.google.com with SMTP id b12so4852322qca.4 for ; Mon, 17 Sep 2012 08:29:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=FKcJADtXopZ/tEZnIVpqTGDCtxDjCv2vxnF5Ae+uFms=; b=qzclBSzRPzp7qtIDJb9zTpCUIU8eKXNQ+DRrp6JKW+ZJ+Hwk6IIcEAqynssixHO09S Dk47uCK4EYBskaculcVszF8DvEBKaNNBSR5y0d0A5UsqED+z4IDl5XetMSk5esTsoaYh iXenMyNFOOnv3cl8OMsVrl+ykUQMpkMIujYbh2Wd9XBYG/fIHA4Q+eV60rK5h5APIrG5 6dfUeCpXP1OmKpB5M7ISlJnXnqaCS6kww0VgHF2JgeM/0idNef3MfufLjw94CEwpTfQg P2/T4G2ZsVbtSeYWDTVElOzMSp0XZ4KhMVbDP+YnkvMaJjZHS/Pjwfyn1LRWE1FKGo2W +3IQ== Received: by 10.224.174.148 with SMTP id t20mr27993899qaz.67.1347895750758; Mon, 17 Sep 2012 08:29:10 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id d11sm13593751qaj.18.2012.09.17.08.29.09 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 17 Sep 2012 08:29:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 17 Sep 2012 08:28:46 -0700 Message-Id: <1347895732-22212-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347895732-22212-1-git-send-email-rth@twiddle.net> References: <1347895732-22212-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.216.173 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 07/13] tcg-sparc: Change AREG0 in generated code to %i0. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We can now move the TCG variable from %g[56] to a call-preserved windowed register. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 3 ++- tcg/sparc/tcg-target.h | 8 +------- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 5acfeba..9ab5746 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -696,7 +696,8 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) | INSN_RS2(TCG_REG_G0)); - tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0); + /* delay slot */ + tcg_out_nop(s); } #if defined(CONFIG_SOFTMMU) diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 4092e29..31b98e2 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -128,13 +128,7 @@ typedef enum { #define TCG_TARGET_HAS_GUEST_BASE -#ifdef CONFIG_SOLARIS -#define TCG_AREG0 TCG_REG_G2 -#elif HOST_LONG_BITS == 64 -#define TCG_AREG0 TCG_REG_G5 -#else -#define TCG_AREG0 TCG_REG_G6 -#endif +#define TCG_AREG0 TCG_REG_I0 static inline void flush_icache_range(tcg_target_ulong start, tcg_target_ulong stop)