From patchwork Sun Sep 9 21:05:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182681 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1F0A22C009D for ; Mon, 10 Sep 2012 08:11:36 +1000 (EST) Received: from localhost ([::1]:44704 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TApj4-0003CY-8q for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 18:11:34 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57029) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojE-000071-IQ for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAojC-0006Ba-Md for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:40 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:63857) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojC-0005xl-GT for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:38 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so292285pbb.4 for ; Sun, 09 Sep 2012 14:07:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=e2mzxxYzb2nvYbL4rln8SAfUZFwWQdS0AVbe5rdFT0U=; b=HQ+nbo9xZ5nvhQEVgpNRWSVAbejBF5dOXD+dyW0P7vGE4Hc/2+BNe6lJvWYfx2ikAq 32DxZiAMcYP2pintVgoukb+lgAeZKEwxF+QXM3RnC6L3wSJvFQaC1wwpYg4Y8DfGRMPw eBEo/OBsYk4Bfc7IjFMFe3JguZZFAB3WgtxzZrJRTJ6A7BVhExbHKV1x+s5zbL3GZ+cr lVg/LqvWMGqu2SamG4A+OaU8Iwy+d2r/7qCrb3oc0DeqNpo5AQ7F1oWvBkRnJY/WM6lh 9cMLNSVpggXv4RZuOA2FvYGw06PbQLkgFjS+ZYbAAsKE5b8LOK14I4keENHJwtOMD0+R TBiQ== Received: by 10.68.218.72 with SMTP id pe8mr2070799pbc.33.1347224858259; Sun, 09 Sep 2012 14:07:38 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.37 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:05:33 -0700 Message-Id: <1347224784-19472-76-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 075/126] target-s390: Convert FP LOAD COMPLIMENT, NEGATIVE, POSITIVE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/fpu_helper.c | 65 ------------------------------------ target-s390x/helper.h | 6 ---- target-s390x/insn-data.def | 9 +++++ target-s390x/translate.c | 83 +++++++++++++++++++++++++++++++--------------- 4 files changed, 66 insertions(+), 97 deletions(-) diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index 2c77fc6..df70b1a 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -361,71 +361,6 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al) return ret; } -/* absolute value of 32-bit float */ -uint32_t HELPER(lpebr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - float32 v1; - float32 v2 = env->fregs[f2].d; - - v1 = float32_abs(v2); - env->fregs[f1].d = v1; - return set_cc_nz_f32(v1); -} - -/* absolute value of 64-bit float */ -uint32_t HELPER(lpdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - float64 v1; - float64 v2 = env->fregs[f2].d; - - v1 = float64_abs(v2); - env->fregs[f1].d = v1; - return set_cc_nz_f64(v1); -} - -/* absolute value of 128-bit float */ -uint32_t HELPER(lpxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - CPU_QuadU v1; - CPU_QuadU v2; - - v2.ll.upper = env->fregs[f2].ll; - v2.ll.lower = env->fregs[f2 + 2].ll; - v1.q = float128_abs(v2.q); - env->fregs[f1].ll = v1.ll.upper; - env->fregs[f1 + 2].ll = v1.ll.lower; - return set_cc_nz_f128(v1.q); -} - -/* load complement of 32-bit float */ -uint32_t HELPER(lcebr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - env->fregs[f1].l.upper = float32_chs(env->fregs[f2].l.upper); - - return set_cc_nz_f32(env->fregs[f1].l.upper); -} - -/* load complement of 64-bit float */ -uint32_t HELPER(lcdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - env->fregs[f1].d = float64_chs(env->fregs[f2].d); - - return set_cc_nz_f64(env->fregs[f1].d); -} - -/* load complement of 128-bit float */ -uint32_t HELPER(lcxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - CPU_QuadU x1, x2; - - x2.ll.upper = env->fregs[f2].ll; - x2.ll.lower = env->fregs[f2 + 2].ll; - x1.q = float128_chs(x2.q); - env->fregs[f1].ll = x1.ll.upper; - env->fregs[f1 + 2].ll = x1.ll.lower; - return set_cc_nz_f128(x1.q); -} - /* 32-bit FP compare */ uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { diff --git a/target-s390x/helper.h b/target-s390x/helper.h index 739ad1f..59ebe36 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -67,12 +67,6 @@ DEF_HELPER_2(lxdb, i64, env, i64) DEF_HELPER_2(lxeb, i64, env, i64) DEF_HELPER_2(ledb, i64, env, i64) DEF_HELPER_3(lexb, i64, env, i64, i64) -DEF_HELPER_3(lpebr, i32, env, i32, i32) -DEF_HELPER_3(lpdbr, i32, env, i32, i32) -DEF_HELPER_3(lpxbr, i32, env, i32, i32) -DEF_HELPER_3(lcebr, i32, env, i32, i32) -DEF_HELPER_3(lcdbr, i32, env, i32, i32) -DEF_HELPER_3(lcxbr, i32, env, i32, i32) DEF_HELPER_FLAGS_3(ceb, TCG_CALL_PURE, i32, env, i64, i64) DEF_HELPER_FLAGS_3(cdb, TCG_CALL_PURE, i32, env, i64, i64) DEF_HELPER_FLAGS_5(cxb, TCG_CALL_PURE, i32, env, i64, i64, i64, i64) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 8fba8c7..9c555d7 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -266,6 +266,9 @@ C(0x1300, LCR, RR_a, Z, 0, r2, new, r1_32, neg, neg32) C(0xb903, LCGR, RRE, Z, 0, r2, r1, 0, neg, neg64) C(0xb913, LCGFR, RRE, Z, 0, r2_32s, r1, 0, neg, neg64) + C(0xb303, LCEBR, RRE, Z, 0, e2, new, e1, negf32, f32) + C(0xb313, LCDBR, RRE, Z, 0, f2_o, f1, 0, negf64, f64) + C(0xb343, LCXBR, RRE, Z, 0, x2_o, x1, 0, negf128, f128) /* LOAD HALFWORD */ C(0xb927, LHR, RRE, EI, 0, r2_16s, 0, r1_32, mov2, 0) C(0xb907, LGHR, RRE, EI, 0, r2_16s, 0, r1, mov2, 0) @@ -310,10 +313,16 @@ C(0x1100, LNR, RR_a, Z, 0, r2_32s, new, r1_32, nabs, nabs32) C(0xb901, LNGR, RRE, Z, 0, r2, r1, 0, nabs, nabs64) C(0xb911, LNGFR, RRE, Z, 0, r2_32s, r1, 0, nabs, nabs64) + C(0xb301, LNEBR, RRE, Z, 0, e2, new, e1, nabsf32, f32) + C(0xb311, LNDBR, RRE, Z, 0, f2_o, f1, 0, nabsf64, f64) + C(0xb341, LNXBR, RRE, Z, 0, x2_o, x1, 0, nabsf128, f128) /* LOAD POSITIVE */ C(0x1000, LPR, RR_a, Z, 0, r2_32s, new, r1_32, abs, abs32) C(0xb900, LPGR, RRE, Z, 0, r2, r1, 0, abs, abs64) C(0xb910, LPGFR, RRE, Z, 0, r2_32s, r1, 0, abs, abs64) + C(0xb300, LPEBR, RRE, Z, 0, e2, new, e1, absf32, f32) + C(0xb310, LPDBR, RRE, Z, 0, f2_o, f1, 0, absf64, f64) + C(0xb340, LPXBR, RRE, Z, 0, x2_o, x1, 0, absf128, f128) /* LOAD REVERSED */ C(0xb91f, LRVR, RRE, Z, 0, r2_32u, new, r1_32, rev32, 0) C(0xb90f, LRVGR, RRE, Z, 0, r2_o, r1, 0, rev64, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 7a329ca..c9029ed 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1381,35 +1381,9 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) tcg_temp_free_i32(tmp32_2); switch (op) { - case 0x0: /* LPEBR R1,R2 [RRE] */ - FP_HELPER_CC(lpebr); - break; - case 0x3: /* LCEBR R1,R2 [RRE] */ - FP_HELPER_CC(lcebr); - break; - case 0x10: /* LPDBR R1,R2 [RRE] */ - FP_HELPER_CC(lpdbr); - break; - case 0x13: /* LCDBR R1,R2 [RRE] */ - FP_HELPER_CC(lcdbr); - break; case 0x15: /* SQBDR R1,R2 [RRE] */ FP_HELPER(sqdbr); break; - case 0x40: /* LPXBR R1,R2 [RRE] */ - FP_HELPER_CC(lpxbr); - break; - case 0x43: /* LCXBR R1,R2 [RRE] */ - FP_HELPER_CC(lcxbr); - break; - case 0x65: /* LXR R1,R2 [RRE] */ - tmp = load_freg(r2); - store_freg(r1, tmp); - tcg_temp_free_i64(tmp); - tmp = load_freg(r2 + 2); - store_freg(r1 + 2, tmp); - tcg_temp_free_i64(tmp); - break; case 0x74: /* LZER R1 [RRE] */ tmp32_1 = tcg_const_i32(r1); gen_helper_lzer(cpu_env, tmp32_1); @@ -1948,6 +1922,25 @@ static ExitStatus op_abs(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_absf32(DisasContext *s, DisasOps *o) +{ + tcg_gen_andi_i64(o->out, o->in2, 0x7fffffffull); + return NO_EXIT; +} + +static ExitStatus op_absf64(DisasContext *s, DisasOps *o) +{ + tcg_gen_andi_i64(o->out, o->in2, 0x7fffffffffffffffull); + return NO_EXIT; +} + +static ExitStatus op_absf128(DisasContext *s, DisasOps *o) +{ + tcg_gen_andi_i64(o->out, o->in1, 0x7fffffffffffffffull); + tcg_gen_mov_i64(o->out2, o->in2); + return NO_EXIT; +} + static ExitStatus op_add(DisasContext *s, DisasOps *o) { tcg_gen_add_i64(o->out, o->in1, o->in2); @@ -2736,6 +2729,25 @@ static ExitStatus op_nabs(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_nabsf32(DisasContext *s, DisasOps *o) +{ + tcg_gen_ori_i64(o->out, o->in2, 0x80000000ull); + return NO_EXIT; +} + +static ExitStatus op_nabsf64(DisasContext *s, DisasOps *o) +{ + tcg_gen_ori_i64(o->out, o->in2, 0x8000000000000000ull); + return NO_EXIT; +} + +static ExitStatus op_nabsf128(DisasContext *s, DisasOps *o) +{ + tcg_gen_ori_i64(o->out, o->in1, 0x8000000000000000ull); + tcg_gen_mov_i64(o->out2, o->in2); + return NO_EXIT; +} + static ExitStatus op_nc(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1)); @@ -2752,6 +2764,25 @@ static ExitStatus op_neg(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_negf32(DisasContext *s, DisasOps *o) +{ + tcg_gen_xori_i64(o->out, o->in2, 0x80000000ull); + return NO_EXIT; +} + +static ExitStatus op_negf64(DisasContext *s, DisasOps *o) +{ + tcg_gen_xori_i64(o->out, o->in2, 0x8000000000000000ull); + return NO_EXIT; +} + +static ExitStatus op_negf128(DisasContext *s, DisasOps *o) +{ + tcg_gen_xori_i64(o->out, o->in1, 0x8000000000000000ull); + tcg_gen_mov_i64(o->out2, o->in2); + return NO_EXIT; +} + static ExitStatus op_oc(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_const_i32(get_field(s->fields, l1));