From patchwork Sun Sep 9 21:05:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182668 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C5C2A2C0095 for ; Mon, 10 Sep 2012 07:55:37 +1000 (EST) Received: from localhost ([::1]:57726 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoli-0003Dq-OV for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:10:14 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56978) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojB-0008Sg-45 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoj9-0006AK-BO for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:37 -0400 Received: from mail-pz0-f45.google.com ([209.85.210.45]:63059) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoj9-0005pO-5K for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:35 -0400 Received: by mail-pz0-f45.google.com with SMTP id n15so968311dad.4 for ; Sun, 09 Sep 2012 14:07:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=wp5NU9kp8/PptE5ZRJUh38S33AMX+acclcR+8vIeGLc=; b=dkZp2PWEVddxoXvREABFZBOovno2CJ4I7pUUT98ZVnWdjPqT+ro0peGEy/WXhgx7Pt T5uZ4ahsAo06WtjlJr9GD9Et1taiNHgIR9TtRn7lZH9ubtsU3ZU7544VY5bKBhjFJyvv +vTZf0/xvLNzCoPXpgbusq935EDbdQdDcY6wepuh4yPkZuMxHCAABE0T6wmrZT/t9Kj/ TwDyJ5qolYz9T52/YG/yhQo0ePUXaj4VEjqHr8TCLfOBxRRXOZJdx4Jx9RwJ2qlnN8Ll ZvIhdsufCarQkGJu+ldFfJ49qMnG7jD0Qr5mzYaMqs5q6OqwAqs1xFdoTd6/ZrvWot79 Jnhg== Received: by 10.66.74.195 with SMTP id w3mr17984809pav.64.1347224854881; Sun, 09 Sep 2012 14:07:34 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.34 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:05:29 -0700 Message-Id: <1347224784-19472-72-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 071/126] target-s390: Convert FP DIVIDE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/fpu_helper.c | 68 ++++++++++++++-------------------------------- target-s390x/helper.h | 8 ++---- target-s390x/insn-data.def | 5 ++++ target-s390x/translate.c | 41 +++++++++++++--------------- 4 files changed, 47 insertions(+), 75 deletions(-) diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index 4dac096..aca3b77 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -240,28 +240,31 @@ uint64_t HELPER(sxb)(CPUS390XState *env, uint64_t ah, uint64_t al, return RET128(ret); } -/* 32-bit FP division RR */ -void HELPER(debr)(CPUS390XState *env, uint32_t f1, uint32_t f2) +/* 32-bit FP division */ +uint64_t HELPER(deb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - env->fregs[f1].l.upper = float32_div(env->fregs[f1].l.upper, - env->fregs[f2].l.upper, - &env->fpu_status); + float32 ret = float32_div(f1, f2, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; } -/* 128-bit FP division RR */ -void HELPER(dxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) +/* 64-bit FP division */ +uint64_t HELPER(ddb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { - CPU_QuadU v1; - CPU_QuadU v2; - CPU_QuadU res; + float64 ret = float64_div(f1, f2, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; +} - v1.ll.upper = env->fregs[f1].ll; - v1.ll.lower = env->fregs[f1 + 2].ll; - v2.ll.upper = env->fregs[f2].ll; - v2.ll.lower = env->fregs[f2 + 2].ll; - res.q = float128_div(v1.q, v2.q, &env->fpu_status); - env->fregs[f1].ll = res.ll.upper; - env->fregs[f1 + 2].ll = res.ll.lower; +/* 128-bit FP division */ +uint64_t HELPER(dxb)(CPUS390XState *env, uint64_t ah, uint64_t al, + uint64_t bh, uint64_t bl) +{ + float128 ret = float128_div(make_float128(ah, al), + make_float128(bh, bl), + &env->fpu_status); + handle_exceptions(env, GETPC()); + return RET128(ret); } /* 64-bit FP multiplication RR */ @@ -400,18 +403,6 @@ uint32_t HELPER(lcxbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) return set_cc_nz_f128(x1.q); } -/* 32-bit FP division RM */ -void HELPER(deb)(CPUS390XState *env, uint32_t f1, uint32_t val) -{ - float32 v1 = env->fregs[f1].l.upper; - CPU_FloatU v2; - - v2.l = val; - HELPER_LOG("%s: dividing 0x%d from f%d by 0x%d\n", __func__, - v1, f1, v2.f); - env->fregs[f1].l.upper = float32_div(v1, v2.f, &env->fpu_status); -} - /* 32-bit FP multiplication RM */ void HELPER(meeb)(CPUS390XState *env, uint32_t f1, uint32_t val) { @@ -463,18 +454,6 @@ void HELPER(mdb)(CPUS390XState *env, uint32_t f1, uint64_t a2) env->fregs[f1].d = float64_mul(v1, v2.d, &env->fpu_status); } -/* 64-bit FP division RM */ -void HELPER(ddb)(CPUS390XState *env, uint32_t f1, uint64_t a2) -{ - float64 v1 = env->fregs[f1].d; - CPU_DoubleU v2; - - v2.ll = cpu_ldq_data(env, a2); - HELPER_LOG("%s: dividing 0x%lx from f%d by 0x%ld\n", __func__, - v1, f1, v2.d); - env->fregs[f1].d = float64_div(v1, v2.d, &env->fpu_status); -} - static void set_round_mode(CPUS390XState *env, int m3) { switch (m3) { @@ -612,13 +591,6 @@ void HELPER(meebr)(CPUS390XState *env, uint32_t f1, uint32_t f2) &env->fpu_status); } -/* 64-bit FP division RR */ -void HELPER(ddbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) -{ - env->fregs[f1].d = float64_div(env->fregs[f1].d, env->fregs[f2].d, - &env->fpu_status); -} - /* 64-bit FP multiply and add RM */ void HELPER(madb)(CPUS390XState *env, uint32_t f1, uint64_t a2, uint32_t f3) { diff --git a/target-s390x/helper.h b/target-s390x/helper.h index b3f5a40..b0b4809 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -53,8 +53,9 @@ DEF_HELPER_5(axb, i64, env, i64, i64, i64, i64) DEF_HELPER_3(seb, i64, env, i64, i64) DEF_HELPER_3(sdb, i64, env, i64, i64) DEF_HELPER_5(sxb, i64, env, i64, i64, i64, i64) -DEF_HELPER_3(debr, void, env, i32, i32) -DEF_HELPER_3(dxbr, void, env, i32, i32) +DEF_HELPER_3(deb, i64, env, i64, i64) +DEF_HELPER_3(ddb, i64, env, i64, i64) +DEF_HELPER_5(dxb, i64, env, i64, i64, i64, i64) DEF_HELPER_3(mdbr, void, env, i32, i32) DEF_HELPER_3(mxbr, void, env, i32, i32) DEF_HELPER_2(ldeb, i64, env, i64) @@ -69,10 +70,8 @@ DEF_HELPER_3(lpxbr, i32, env, i32, i32) DEF_HELPER_3(lcebr, i32, env, i32, i32) DEF_HELPER_3(lcdbr, i32, env, i32, i32) DEF_HELPER_3(lcxbr, i32, env, i32, i32) -DEF_HELPER_3(deb, void, env, i32, i32) DEF_HELPER_3(meeb, void, env, i32, i32) DEF_HELPER_3(mdb, void, env, i32, i64) -DEF_HELPER_3(ddb, void, env, i32, i64) DEF_HELPER_FLAGS_3(ceb, TCG_CALL_PURE, i32, env, i64, i64) DEF_HELPER_FLAGS_3(cdb, TCG_CALL_PURE, i32, env, i64, i64) DEF_HELPER_FLAGS_5(cxb, TCG_CALL_PURE, i32, env, i64, i64, i64, i64) @@ -86,7 +85,6 @@ DEF_HELPER_4(cfebr, i32, env, i32, i32, i32) DEF_HELPER_4(cfdbr, i32, env, i32, i32, i32) DEF_HELPER_4(cfxbr, i32, env, i32, i32, i32) DEF_HELPER_3(meebr, void, env, i32, i32) -DEF_HELPER_3(ddbr, void, env, i32, i32) DEF_HELPER_4(madb, void, env, i32, i64, i32) DEF_HELPER_4(maebr, void, env, i32, i32, i32) DEF_HELPER_4(madbr, void, env, i32, i32, i32) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 9b02904..d6e0a6e 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -167,6 +167,11 @@ /* DIVIDE */ C(0x1d00, DR, RR_a, Z, r1_P32, r2_32s, new_P, r1_P32, divs32, 0) C(0x5d00, D, RX_a, Z, r1_P32, m2_32s, new_P, r1_P32, divs32, 0) + C(0xb30d, DEBR, RRE, Z, e1, e2, new, e1, deb, 0) + C(0xb31d, DDBR, RRE, Z, f1_o, f2_o, f1, 0, ddb, 0) + C(0xb34d, DXBR, RRE, Z, 0, x2_o, x1, 0, dxb, 0) + C(0xed0d, DEB, RXE, Z, e1, m2_32u, new, e1, deb, 0) + C(0xed1d, DDB, RXE, Z, f1_o, m2_64, f1, 0, ddb, 0) /* DIVIDE LOGICAL */ C(0xb997, DLR, RRE, Z, r1_P32, r2_32u, new_P, r1_P32, divu32, 0) C(0xe397, DL, RXY_a, Z, r1_P32, m2_32u, new_P, r1_P32, divu32, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 2ed8b2c..7f02261 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -993,15 +993,6 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, addr = get_address(s, x2, b2, d2); tmp_r1 = tcg_const_i32(r1); switch (op) { - case 0xd: /* DEB R1,D2(X2,B2) [RXE] */ - tmp = tcg_temp_new_i64(); - tmp32 = tcg_temp_new_i32(); - tcg_gen_qemu_ld32u(tmp, addr, get_mem_index(s)); - tcg_gen_trunc_i64_i32(tmp32, tmp); - gen_helper_deb(cpu_env, tmp_r1, tmp32); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32); - break; case 0x10: /* TCEB R1,D2(X2,B2) [RXE] */ potential_page_fault(s); gen_helper_tceb(cc_op, cpu_env, tmp_r1, addr); @@ -1030,10 +1021,6 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2, potential_page_fault(s); gen_helper_mdb(cpu_env, tmp_r1, addr); break; - case 0x1d: /* DDB R1,D2(X2,B2) [RXE] */ - potential_page_fault(s); - gen_helper_ddb(cpu_env, tmp_r1, addr); - break; case 0x1e: /* MADB R1,R3,D2(X2,B2) [RXF] */ /* for RXF insns, r1 is R3 and r1b is R1 */ tmp32 = tcg_const_i32(r1b); @@ -1452,9 +1439,6 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) case 0x3: /* LCEBR R1,R2 [RRE] */ FP_HELPER_CC(lcebr); break; - case 0xd: /* DEBR R1,R2 [RRE] */ - FP_HELPER(debr); - break; case 0x10: /* LPDBR R1,R2 [RRE] */ FP_HELPER_CC(lpdbr); break; @@ -1470,9 +1454,6 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) case 0x1c: /* MDBR R1,R2 [RRE] */ FP_HELPER(mdbr); break; - case 0x1d: /* DDBR R1,R2 [RRE] */ - FP_HELPER(ddbr); - break; case 0xe: /* MAEBR R1,R3,R2 [RRF] */ case 0x1e: /* MADBR R1,R3,R2 [RRF] */ case 0x1f: /* MSDBR R1,R3,R2 [RRF] */ @@ -1506,9 +1487,6 @@ static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) case 0x4c: /* MXBR R1,R2 [RRE] */ FP_HELPER(mxbr); break; - case 0x4d: /* DXBR R1,R2 [RRE] */ - FP_HELPER(dxbr); - break; case 0x65: /* LXR R1,R2 [RRE] */ tmp = load_freg(r2); store_freg(r1, tmp); @@ -2379,6 +2357,25 @@ static ExitStatus op_divu64(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_deb(DisasContext *s, DisasOps *o) +{ + gen_helper_deb(o->out, cpu_env, o->in1, o->in2); + return NO_EXIT; +} + +static ExitStatus op_ddb(DisasContext *s, DisasOps *o) +{ + gen_helper_ddb(o->out, cpu_env, o->in1, o->in2); + return NO_EXIT; +} + +static ExitStatus op_dxb(DisasContext *s, DisasOps *o) +{ + gen_helper_dxb(o->out, cpu_env, o->out, o->out2, o->in1, o->in2); + return_low128(o->out2); + return NO_EXIT; +} + static ExitStatus op_efpc(DisasContext *s, DisasOps *o) { tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, fpc));