From patchwork Sun Sep 9 21:04:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182684 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E56022C008A for ; Mon, 10 Sep 2012 08:16:36 +1000 (EST) Received: from localhost ([::1]:55056 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoke-0001nn-IV for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:09:08 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56554) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoik-0007kt-H9 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoij-00061X-7X for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:10 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:63857) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoij-0005xl-23 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:09 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so292285pbb.4 for ; Sun, 09 Sep 2012 14:07:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=0PwMshr55QSJfHcYxi8dZaFhK3ZqhhwkC9oryndsPeA=; b=il+4SRNkbXH9zdini3LTB4kwdpJcxDZiKDpwM1eB7iPuKr8ZXzt2XBtT8RvtYCF7Ki gnfABMIrtpIDmUQdcRXk7j5waFvqLGfkHyHujjnf5Wux+dKI9bCI5q5FWrEMDYi1Yw11 void5/iHaoInYct6xwB84rt6wSBpT4KYeJf63X7GymZ9PWefEfLo2cAlLK1W88y+b7QJ SYrrqd0nFcUPWWqRSXTQ1cpufgMoqEgovgd++BF7kxtvqzdA/bUz/m7VPfrY+ZajM0nr nqMNUs78+C9liIQcYzzfcbeiHcvIv+huS+TMx2VjBSIzA8rGEtf/XtwYNDXTvQDk7oJq c2yA== Received: by 10.66.75.133 with SMTP id c5mr18323050paw.24.1347224828803; Sun, 09 Sep 2012 14:07:08 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.07 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:04:59 -0700 Message-Id: <1347224784-19472-42-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 041/126] target-s390: Convert CONVERT TO DECIMAL X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 24 ++++++++++++------------ 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 68f9711..9d26370 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -131,6 +131,10 @@ C(0xc607, CLHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu32) C(0xc606, CLGHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu64) +/* CONVERT TO DECIMAL */ + C(0x4e00, CVD, RX_a, Z, r1_o, a2, 0, 0, cvd, 0) + C(0xe326, CVDY, RXY_a, LD, r1_o, a2, 0, 0, cvd, 0) + /* DIVIDE */ C(0x1d00, DR, RR_a, Z, r1_P32, r2_32s, new_P, r1_P32, divs32, 0) C(0x5d00, D, RX_a, Z, r1_P32, m2_32s, new_P, r1_P32, divs32, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 621cd20..11feffd 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2348,18 +2348,6 @@ static void disas_s390_insn(DisasContext *s) LOG_DISAS("opc 0x%x\n", opc); switch (opc) { - case 0x4e: /* CVD R1,D2(X2,B2) [RX] */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - tmp2 = tcg_temp_new_i64(); - tmp32_1 = tcg_temp_new_i32(); - tcg_gen_trunc_i64_i32(tmp32_1, regs[r1]); - gen_helper_cvd(tmp2, tmp32_1); - tcg_gen_qemu_st64(tmp2, tmp, get_mem_index(s)); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i32(tmp32_1); - break; #ifndef CONFIG_USER_ONLY case 0x80: /* SSM D2(B2) [S] */ /* Set System Mask */ @@ -3310,6 +3298,18 @@ static ExitStatus op_bct64(DisasContext *s, DisasOps *o) return help_branch(s, &c, is_imm, imm, o->in2); } +static ExitStatus op_cvd(DisasContext *s, DisasOps *o) +{ + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i32 t2 = tcg_temp_new_i32(); + tcg_gen_trunc_i64_i32(t2, o->in1); + gen_helper_cvd(t1, t2); + tcg_temp_free_i32(t2); + tcg_gen_qemu_st64(t1, o->in2, get_mem_index(s)); + tcg_temp_free_i64(t1); + return NO_EXIT; +} + static ExitStatus op_divs32(DisasContext *s, DisasOps *o) { gen_helper_divs32(o->out2, cpu_env, o->in1, o->in2);