From patchwork Sun Sep 9 21:04:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182744 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A35E92C0093 for ; Mon, 10 Sep 2012 09:15:51 +1000 (EST) Received: from localhost ([::1]:54228 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAokK-0001Ms-La for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:08:48 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56524) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoij-0007gk-7I for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoih-00060q-Gb for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:09 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:63857) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoih-0005xl-Ab for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:07 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so292285pbb.4 for ; Sun, 09 Sep 2012 14:07:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Rgfkwka2a7jx0EQa/minY1CKpNdo27hPKSskwuteBHQ=; b=LyjubA1o4kFqjBj7j4y7lMB+2gz04wAFMX9UXFesTfAS0i/dyGeXKoaBYV31+bTgXy CDPX4G2F5tMcFUuqNXuAnVCmofycl+0B7wQNsPcjBqIB3NLKN95q5b1hOxEuzWNvJayY FkeFXtSHSIpAEjOHmTx6GNJ9hXIUriQvdaUWK4dfkba70KV9ws7b294ei0B8S4pXbs/O ka1W+sAJqIyNtAsDVtyPkmSVW2j99U82su9qPNysXaLKpBqq2XahQJHo5Q/diKVmNl3F Yku6Y8iEsFOX0DNT7LrVquUauobtsuaFbSc5Zjrj/TcEfFtrzmCn0Vtqdhm6V9Zq3wS7 qCdQ== Received: by 10.68.134.99 with SMTP id pj3mr2024887pbb.13.1347224827085; Sun, 09 Sep 2012 14:07:07 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.06 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:04:57 -0700 Message-Id: <1347224784-19472-40-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 039/126] target-s390: Convert EXECUTE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 5 +++++ target-s390x/translate.c | 39 ++++++++++++++++++++++++++------------- 2 files changed, 31 insertions(+), 13 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 322fcc1..6bd4265 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -157,6 +157,11 @@ D(0xc006, XIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2020) D(0xc007, XILF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2000) +/* EXECUTE */ + C(0x4400, EX, RX_a, Z, r1_o, a2, 0, 0, ex, 0) +/* EXECUTE RELATIVE LONG */ + C(0xc600, EXRL, RIL_b, EE, r1_o, ri2, 0, 0, ex, 0) + /* INSERT CHARACTER */ C(0x4300, IC, RX_a, Z, 0, m2_8u, 0, r1_8, mov2, 0) C(0xe373, ICY, RXY_a, LD, 0, m2_8u, 0, r1_8, mov2, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index e9eae6f..c37c567 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2348,19 +2348,6 @@ static void disas_s390_insn(DisasContext *s) LOG_DISAS("opc 0x%x\n", opc); switch (opc) { - case 0x44: /* EX R1,D2(X2,B2) [RX] */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - tmp2 = load_reg(r1); - tmp3 = tcg_const_i64(s->pc + 4); - update_psw_addr(s); - gen_op_calc_cc(s); - gen_helper_ex(cc_op, cpu_env, cc_op, tmp2, tmp, tmp3); - set_cc_static(s); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i64(tmp3); - break; case 0x4e: /* CVD R1,D2(X2,B2) [RX] */ insn = ld_code4(s->pc); tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); @@ -3370,6 +3357,32 @@ static ExitStatus op_divu64(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_ex(DisasContext *s, DisasOps *o) +{ + /* ??? Perhaps a better way to implement EXECUTE is to set a bit in + tb->flags, (ab)use the tb->cs_base field as the address of + the template in memory, and grab 8 bits of tb->flags/cflags for + the contents of the register. We would then recognize all this + in gen_intermediate_code_internal, generating code for exactly + one instruction. This new TB then gets executed normally. + + On the other hand, this seems to be mostly used for modifying + MVC inside of memcpy, which needs a helper call anyway. So + perhaps this doesn't bear thinking about any further. */ + + TCGv_i64 tmp; + + update_psw_addr(s); + gen_op_calc_cc(s); + + tmp = tcg_const_i64(s->next_pc); + gen_helper_ex(cc_op, cpu_env, cc_op, o->in1, o->in2, tmp); + tcg_temp_free_i64(tmp); + + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_icm(DisasContext *s, DisasOps *o) { int m3 = get_field(s->fields, m3);