From patchwork Sun Sep 9 21:04:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182747 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C95B32C007D for ; Mon, 10 Sep 2012 09:16:49 +1000 (EST) Received: from localhost ([::1]:54225 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAokK-0001Mp-MK for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:08:48 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56200) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoiQ-0006mO-Sv for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoiP-0005uc-5v for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:50 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:59699) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoiP-0005pQ-14 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:49 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so291958pbb.4 for ; Sun, 09 Sep 2012 14:06:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=lys0CRES2kFayKUFrBztcbKxLAnh0oNqJUnQCop+Lzs=; b=FbTnjVye4YxmqzPut03iCi9/PFHJfL5lg8sW1QQ5NsOZ3k1ICHrBk5HWZEln01HIis hNUfu0TW1ba8Za9RVV/mIYFiNjxtlnnv6sVrooG2QB1k29jUTldXSP8nEYTW+3Y/u+oM 0PLaB/TF4H41OWqpx3o0lWgbvCuYAQnNrzXfWmcwGs5j59/qHYdswLRgYwlPXMUy3j/e OGryGSSQh1tmhnDD/2Afl/srtFDhwJ0uLhAA+RZ6KvtV6E+ubpSHgUN+DML4ibMnwPq5 FtwzDTHRUHrfM1DnYBbnQrcIIUuA+7rQEvy4b3O8ISSMhdScfiLvcCBjwChtlzHyZHga Ut0A== Received: by 10.66.76.231 with SMTP id n7mr18016418paw.68.1347224808780; Sun, 09 Sep 2012 14:06:48 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.06.47 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:06:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:04:36 -0700 Message-Id: <1347224784-19472-19-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 018/126] target-s390: Convert LOAD ADDRESS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 5 +++++ target-s390x/translate.c | 14 -------------- 2 files changed, 5 insertions(+), 14 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 2590f83..0829368 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -121,6 +121,11 @@ C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0) C(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0) C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0) +/* LOAD ADDRESS */ + C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0) + C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0) +/* LOAD ADDRESS RELATIVE LONG */ + C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0) /* LOAD LOGICAL */ C(0xb916, LLGFR, RRE, Z, 0, r2_32u, 0, r1, mov2, 0) C(0xe316, LLGF, RXY_a, Z, 0, a2, r1, 0, ld32u, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 82dda8b..8fafcff 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1439,9 +1439,6 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2) tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); tcg_temp_free_i64(tmp2); break; - case 0x71: /* LAY R1,D2(X2,B2) [RXY] */ - store_reg(r1, addr); - break; case 0x72: /* STCY R1,D2(X2,B2) [RXY] */ tmp32_1 = load_reg32(r1); tmp2 = tcg_temp_new_i64(); @@ -3083,11 +3080,6 @@ static void disas_c0(DisasContext *s, int op, int r1, int i2) LOG_DISAS("disas_c0: op 0x%x r1 %d i2 %d\n", op, r1, i2); switch (op) { - case 0: /* larl r1, i2 */ - tmp = tcg_const_i64(target); - store_reg(r1, tmp); - tcg_temp_free_i64(tmp); - break; case 0x4: /* BRCL M1,I2 [RIL] */ /* m1 & (1 << (3 - cc)) */ tmp32_1 = tcg_const_i32(3); @@ -3360,12 +3352,6 @@ static void disas_s390_insn(DisasContext *s) tcg_temp_free_i64(tmp); tcg_temp_free_i64(tmp2); break; - case 0x41: /* la */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - store_reg(r1, tmp); /* FIXME: 31/24-bit addressing */ - tcg_temp_free_i64(tmp); - break; case 0x42: /* STC R1,D2(X2,B2) [RX] */ insn = ld_code4(s->pc); tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2);