From patchwork Wed Jul 25 22:10:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 173295 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3034F2C0085 for ; Thu, 26 Jul 2012 08:11:12 +1000 (EST) Received: from localhost ([::1]:48801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Su9nS-0007mG-3N for incoming@patchwork.ozlabs.org; Wed, 25 Jul 2012 18:11:10 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Su9n8-0007az-Db for qemu-devel@nongnu.org; Wed, 25 Jul 2012 18:10:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Su9n6-00011H-PX for qemu-devel@nongnu.org; Wed, 25 Jul 2012 18:10:50 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:44694) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Su9n6-00010i-Gc for qemu-devel@nongnu.org; Wed, 25 Jul 2012 18:10:48 -0400 Received: by mail-pb0-f45.google.com with SMTP id ro12so2018027pbb.4 for ; Wed, 25 Jul 2012 15:10:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=OLu64m2jVDze+PHj47261SvQ2dHkiUWGs2oFmGSQe60=; b=f28i3Qe353qGLnWT3kMacck7Wgs9YjullJjmv9ayz/QLoAVJS2tWFKrOQaGgAtmskE Q1cC9qGFiIXpB4sFJ+RKaQsGZScZgd1FjuGPFErTED6aaha5t9fsH6rVq4zJqOJrK8cC TFEhIQdUb0GUQjrJ5xlcWzGSHxvCHz94S7tPCOkxoCrfABMo97ZRJmne/Z/1bzIa0Gnb csV5ifmifuO8tG6tzMNJ1rA49cbDo+d/ZtunKe9rJyZg3UjYeIgVQI3UiQ123ixaB9HL 8jaccFNdT5Fz76LqLn1Uo88TVy7UNWvNWQfpJmBvWtzTi7TgGe70KgBWJ6ZFAQph/wX5 dv+A== Received: by 10.68.225.42 with SMTP id rh10mr57720483pbc.116.1343254248244; Wed, 25 Jul 2012 15:10:48 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id oo6sm15136761pbc.22.2012.07.25.15.10.47 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 25 Jul 2012 15:10:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 25 Jul 2012 15:10:30 -0700 Message-Id: <1343254238-4727-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1343254238-4727-1-git-send-email-rth@twiddle.net> References: <1343254238-4727-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: riku.voipio@iki.fi Subject: [Qemu-devel] [PATCH 02/10] alpha-linux-user: Work around hosted mmap allocation problems X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/cpu.h | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 99f9ee1..0d87fa7 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -40,9 +40,20 @@ #define TARGET_PAGE_BITS 13 +#ifdef CONFIG_USER_ONLY +/* ??? The kernel likes to give addresses in high memory. If the host has + more virtual address space than the guest, this can lead to impossible + allocations. Honor the long-standing assumption that only kernel addrs + are negative, but otherwise allow allocations anywhere. This could lead + to tricky emulation problems for programs doing tagged addressing, but + that's far fewer than encounter the impossible allocation problem. */ +#define TARGET_PHYS_ADDR_SPACE_BITS 63 +#define TARGET_VIRT_ADDR_SPACE_BITS 63 +#else /* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */ #define TARGET_PHYS_ADDR_SPACE_BITS 44 #define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) +#endif /* Alpha major type */ enum {