@@ -640,42 +640,42 @@ static inline void gen_store_srsgpr (int from, int to)
}
/* Floating point register moves. */
-static inline void gen_load_fpr32 (TCGv_i32 t, int reg)
+static inline void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
{
tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
}
-static inline void gen_store_fpr32 (TCGv_i32 t, int reg)
+static inline void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
{
tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
}
-static inline void gen_load_fpr32h (TCGv_i32 t, int reg)
+static inline void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
{
tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
}
-static inline void gen_store_fpr32h (TCGv_i32 t, int reg)
+static inline void gen_store_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
{
tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
}
-static inline void gen_load_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
+static inline void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
{
if (ctx->hflags & MIPS_HFLAG_F64) {
tcg_gen_ld_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
} else {
TCGv_i32 t0 = tcg_temp_new_i32();
TCGv_i32 t1 = tcg_temp_new_i32();
- gen_load_fpr32(t0, reg & ~1);
- gen_load_fpr32(t1, reg | 1);
+ gen_load_fpr32(ctx, t0, reg & ~1);
+ gen_load_fpr32(ctx, t1, reg | 1);
tcg_gen_concat_i32_i64(t, t0, t1);
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
}
}
-static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
+static inline void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
{
if (ctx->hflags & MIPS_HFLAG_F64) {
tcg_gen_st_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
@@ -683,10 +683,10 @@ static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
TCGv_i64 t0 = tcg_temp_new_i64();
TCGv_i32 t1 = tcg_temp_new_i32();
tcg_gen_trunc_i64_i32(t1, t);
- gen_store_fpr32(t1, reg & ~1);
+ gen_store_fpr32(ctx, t1, reg & ~1);
tcg_gen_shri_i64(t0, t, 32);
tcg_gen_trunc_i64_i32(t1, t0);
- gen_store_fpr32(t1, reg | 1);
+ gen_store_fpr32(ctx, t1, reg | 1);
tcg_temp_free_i32(t1);
tcg_temp_free_i64(t0);
}
@@ -840,12 +840,6 @@ static inline void check_mips_64(DisasContext *ctx)
generate_exception(ctx, EXCP_RI);
}
-/* Define small wrappers for gen_load_fpr* so that we have a uniform
- calling interface for 32 and 64-bit FPRs. No sense in changing
- all callers for gen_load_fpr32 when we need the CTX parameter for
- this one use. */
-#define gen_ldcmp_fpr32(ctx, x, y) gen_load_fpr32(x, y)
-#define gen_ldcmp_fpr64(ctx, x, y) gen_load_fpr64(ctx, x, y)
#define FOP_CONDS(type, abs, fmt, ifmt, bits) \
static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n, \
int ft, int fs, int cc) \
@@ -868,8 +862,8 @@ static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n, \
} \
break; \
} \
- gen_ldcmp_fpr##bits (ctx, fp0, fs); \
- gen_ldcmp_fpr##bits (ctx, fp1, ft); \
+ gen_load_fpr##bits(ctx, fp0, fs); \
+ gen_load_fpr##bits(ctx, fp1, ft); \
switch (n) { \
case 0: gen_helper_2i(cmp ## type ## _ ## fmt ## _f, fp0, fp1, cc); break;\
case 1: gen_helper_2i(cmp ## type ## _ ## fmt ## _un, fp0, fp1, cc); break;\
@@ -1264,7 +1258,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32(fp0, ft);
+ gen_store_fpr32(ctx, fp0, ft);
tcg_temp_free_i32(fp0);
}
opn = "lwc1";
@@ -1274,7 +1268,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv t1 = tcg_temp_new();
- gen_load_fpr32(fp0, ft);
+ gen_load_fpr32(ctx, fp0, ft);
tcg_gen_extu_i32_tl(t1, fp0);
tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
tcg_temp_free(t1);
@@ -5704,13 +5698,13 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
if (h == 0) {
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, rt);
+ gen_load_fpr32(ctx, fp0, rt);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
} else {
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32h(fp0, rt);
+ gen_load_fpr32h(ctx, fp0, rt);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
}
@@ -5903,13 +5897,13 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
TCGv_i32 fp0 = tcg_temp_new_i32();
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32(fp0, rd);
+ gen_store_fpr32(ctx, fp0, rd);
tcg_temp_free_i32(fp0);
} else {
TCGv_i32 fp0 = tcg_temp_new_i32();
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32h(fp0, rd);
+ gen_store_fpr32h(ctx, fp0, rd);
tcg_temp_free_i32(fp0);
}
break;
@@ -6325,7 +6319,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
}
@@ -6338,7 +6332,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
TCGv_i32 fp0 = tcg_temp_new_i32();
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32(fp0, fs);
+ gen_store_fpr32(ctx, fp0, fs);
tcg_temp_free_i32(fp0);
}
opn = "mtc1";
@@ -6369,7 +6363,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32h(fp0, fs);
+ gen_load_fpr32h(ctx, fp0, fs);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
}
@@ -6382,7 +6376,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
TCGv_i32 fp0 = tcg_temp_new_i32();
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32h(fp0, fs);
+ gen_store_fpr32h(ctx, fp0, fs);
tcg_temp_free_i32(fp0);
}
opn = "mthc1";
@@ -6428,7 +6422,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
gen_set_label(l1);
}
-static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
+static void gen_movcf_s(DisasContext *ctx, int fs, int fd, int cc, int tf)
{
int cond;
TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6441,13 +6435,13 @@ static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
tcg_gen_brcondi_i32(cond, t0, 0, l1);
- gen_load_fpr32(t0, fs);
- gen_store_fpr32(t0, fd);
+ gen_load_fpr32(ctx, t0, fs);
+ gen_store_fpr32(ctx, t0, fd);
gen_set_label(l1);
tcg_temp_free_i32(t0);
}
-static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int tf)
+static void gen_movcf_d(DisasContext *ctx, int fs, int fd, int cc, int tf)
{
int cond;
TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6469,7 +6463,7 @@ static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t
gen_set_label(l1);
}
-static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
+static void gen_movcf_ps(DisasContext *ctx, int fs, int fd, int cc, int tf)
{
int cond;
TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6483,14 +6477,14 @@ static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
tcg_gen_brcondi_i32(cond, t0, 0, l1);
- gen_load_fpr32(t0, fs);
- gen_store_fpr32(t0, fd);
+ gen_load_fpr32(ctx, t0, fs);
+ gen_store_fpr32(ctx, t0, fd);
gen_set_label(l1);
tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc+1));
tcg_gen_brcondi_i32(cond, t0, 0, l2);
- gen_load_fpr32h(t0, fs);
- gen_store_fpr32h(t0, fd);
+ gen_load_fpr32h(ctx, t0, fs);
+ gen_store_fpr32h(ctx, t0, fd);
tcg_temp_free_i32(t0);
gen_set_label(l2);
}
@@ -6545,11 +6539,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
gen_helper_float_add_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "add.s";
@@ -6560,11 +6554,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
gen_helper_float_sub_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "sub.s";
@@ -6575,11 +6569,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
gen_helper_float_mul_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "mul.s";
@@ -6590,11 +6584,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
gen_helper_float_div_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "div.s";
@@ -6604,9 +6598,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_sqrt_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "sqrt.s";
@@ -6615,9 +6609,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_abs_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "abs.s";
@@ -6626,8 +6620,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_store_fpr32(fp0, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "mov.s";
@@ -6636,9 +6630,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_chs_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "neg.s";
@@ -6649,7 +6643,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_roundl_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6663,7 +6657,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_truncl_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6677,7 +6671,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_ceill_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6691,7 +6685,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_floorl_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6703,9 +6697,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_roundw_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "round.w.s";
@@ -6714,9 +6708,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_truncw_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "trunc.w.s";
@@ -6725,9 +6719,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_ceilw_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "ceil.w.s";
@@ -6736,15 +6730,15 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_floorw_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "floor.w.s";
break;
case OPC_MOVCF_S:
- gen_movcf_s(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
+ gen_movcf_s(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
opn = "movcf.s";
break;
case OPC_MOVZ_S:
@@ -6756,8 +6750,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
}
fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_store_fpr32(fp0, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
gen_set_label(l1);
}
@@ -6771,8 +6765,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
if (ft != 0) {
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_store_fpr32(fp0, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
gen_set_label(l1);
}
@@ -6784,9 +6778,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_recip_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "recip.s";
@@ -6796,9 +6790,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_rsqrt_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "rsqrt.s";
@@ -6809,11 +6803,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, fd);
gen_helper_float_recip2_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "recip2.s";
@@ -6823,9 +6817,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_recip1_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "recip1.s";
@@ -6835,9 +6829,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_rsqrt1_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "rsqrt1.s";
@@ -6848,11 +6842,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
gen_helper_float_rsqrt2_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "rsqrt2.s";
@@ -6863,7 +6857,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_cvtd_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6875,9 +6869,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_cvtw_s(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "cvt.w.s";
@@ -6888,7 +6882,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_cvtl_s(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -6903,8 +6897,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32_0 = tcg_temp_new_i32();
TCGv_i32 fp32_1 = tcg_temp_new_i32();
- gen_load_fpr32(fp32_0, fs);
- gen_load_fpr32(fp32_1, ft);
+ gen_load_fpr32(ctx, fp32_0, fs);
+ gen_load_fpr32(ctx, fp32_1, ft);
tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
tcg_temp_free_i32(fp32_1);
tcg_temp_free_i32(fp32_0);
@@ -7105,7 +7099,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_roundw_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "round.w.d";
@@ -7119,7 +7113,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_truncw_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "trunc.w.d";
@@ -7133,7 +7127,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_ceilw_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "ceil.w.d";
@@ -7147,7 +7141,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_floorw_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "floor.w.d";
@@ -7299,7 +7293,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_cvts_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "cvt.s.d";
@@ -7313,7 +7307,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_cvtw_d(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "cvt.w.d";
@@ -7334,9 +7328,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_cvts_w(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "cvt.s.w";
@@ -7347,7 +7341,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp32 = tcg_temp_new_i32();
TCGv_i64 fp64 = tcg_temp_new_i64();
- gen_load_fpr32(fp32, fs);
+ gen_load_fpr32(ctx, fp32, fs);
gen_helper_float_cvtd_w(fp64, fp32);
tcg_temp_free_i32(fp32);
gen_store_fpr64(ctx, fp64, fd);
@@ -7364,7 +7358,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr64(ctx, fp64, fs);
gen_helper_float_cvts_l(fp32, fp64);
tcg_temp_free_i64(fp64);
- gen_store_fpr32(fp32, fd);
+ gen_store_fpr32(ctx, fp32, fd);
tcg_temp_free_i32(fp32);
}
opn = "cvt.s.l";
@@ -7475,7 +7469,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
break;
case OPC_MOVCF_PS:
check_cp1_64bitmode(ctx);
- gen_movcf_ps(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
+ gen_movcf_ps(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
opn = "movcf.ps";
break;
case OPC_MOVZ_PS:
@@ -7600,9 +7594,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32h(fp0, fs);
+ gen_load_fpr32h(ctx, fp0, fs);
gen_helper_float_cvts_pu(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "cvt.s.pu";
@@ -7624,9 +7618,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
{
TCGv_i32 fp0 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
gen_helper_float_cvts_pl(fp0, fp0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "cvt.s.pl";
@@ -7637,10 +7631,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_store_fpr32h(fp0, fd);
- gen_store_fpr32(fp1, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_store_fpr32h(ctx, fp0, fd);
+ gen_store_fpr32(ctx, fp1, fd);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
}
@@ -7652,10 +7646,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32h(fp1, ft);
- gen_store_fpr32(fp1, fd);
- gen_store_fpr32h(fp0, fd);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32h(ctx, fp1, ft);
+ gen_store_fpr32(ctx, fp1, fd);
+ gen_store_fpr32h(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
}
@@ -7667,10 +7661,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32h(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_store_fpr32(fp1, fd);
- gen_store_fpr32h(fp0, fd);
+ gen_load_fpr32h(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_store_fpr32(ctx, fp1, fd);
+ gen_store_fpr32h(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
}
@@ -7682,10 +7676,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv_i32 fp1 = tcg_temp_new_i32();
- gen_load_fpr32h(fp0, fs);
- gen_load_fpr32h(fp1, ft);
- gen_store_fpr32(fp1, fd);
- gen_store_fpr32h(fp0, fd);
+ gen_load_fpr32h(ctx, fp0, fs);
+ gen_load_fpr32h(ctx, fp1, ft);
+ gen_store_fpr32(ctx, fp1, fd);
+ gen_store_fpr32h(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
}
@@ -7761,7 +7755,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
tcg_gen_trunc_tl_i32(fp0, t0);
- gen_store_fpr32(fp0, fd);
+ gen_store_fpr32(ctx, fp0, fd);
tcg_temp_free_i32(fp0);
}
opn = "lwxc1";
@@ -7796,7 +7790,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
TCGv_i32 fp0 = tcg_temp_new_i32();
TCGv t1 = tcg_temp_new();
- gen_load_fpr32(fp0, fs);
+ gen_load_fpr32(ctx, fp0, fs);
tcg_gen_extu_i32_tl(t1, fp0);
tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
tcg_temp_free_i32(fp0);
@@ -7857,24 +7851,24 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
tcg_gen_andi_tl(t0, t0, 0x7);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
- gen_load_fpr32(fp, fs);
- gen_load_fpr32h(fph, fs);
- gen_store_fpr32(fp, fd);
- gen_store_fpr32h(fph, fd);
+ gen_load_fpr32(ctx, fp, fs);
+ gen_load_fpr32h(ctx, fph, fs);
+ gen_store_fpr32(ctx, fp, fd);
+ gen_store_fpr32h(ctx, fph, fd);
tcg_gen_br(l2);
gen_set_label(l1);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, 4, l2);
tcg_temp_free(t0);
#ifdef TARGET_WORDS_BIGENDIAN
- gen_load_fpr32(fp, fs);
- gen_load_fpr32h(fph, ft);
- gen_store_fpr32h(fp, fd);
- gen_store_fpr32(fph, fd);
+ gen_load_fpr32(ctx, fp, fs);
+ gen_load_fpr32h(ctx, fph, ft);
+ gen_store_fpr32h(ctx, fp, fd);
+ gen_store_fpr32(ctx, fph, fd);
#else
- gen_load_fpr32h(fph, fs);
- gen_load_fpr32(fp, ft);
- gen_store_fpr32(fph, fd);
- gen_store_fpr32h(fp, fd);
+ gen_load_fpr32h(ctx, fph, fs);
+ gen_load_fpr32(ctx, fp, ft);
+ gen_store_fpr32(ctx, fph, fd);
+ gen_store_fpr32h(ctx, fp, fd);
#endif
gen_set_label(l2);
tcg_temp_free_i32(fp);
@@ -7889,13 +7883,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
TCGv_i32 fp1 = tcg_temp_new_i32();
TCGv_i32 fp2 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_load_fpr32(fp2, fr);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_load_fpr32(ctx, fp2, fr);
gen_helper_float_muladd_s(fp2, fp0, fp1, fp2);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp2, fd);
+ gen_store_fpr32(ctx, fp2, fd);
tcg_temp_free_i32(fp2);
}
opn = "madd.s";
@@ -7944,13 +7938,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
TCGv_i32 fp1 = tcg_temp_new_i32();
TCGv_i32 fp2 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_load_fpr32(fp2, fr);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_load_fpr32(ctx, fp2, fr);
gen_helper_float_mulsub_s(fp2, fp0, fp1, fp2);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp2, fd);
+ gen_store_fpr32(ctx, fp2, fd);
tcg_temp_free_i32(fp2);
}
opn = "msub.s";
@@ -7999,13 +7993,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
TCGv_i32 fp1 = tcg_temp_new_i32();
TCGv_i32 fp2 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_load_fpr32(fp2, fr);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_load_fpr32(ctx, fp2, fr);
gen_helper_float_nmuladd_s(fp2, fp0, fp1, fp2);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp2, fd);
+ gen_store_fpr32(ctx, fp2, fd);
tcg_temp_free_i32(fp2);
}
opn = "nmadd.s";
@@ -8054,13 +8048,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
TCGv_i32 fp1 = tcg_temp_new_i32();
TCGv_i32 fp2 = tcg_temp_new_i32();
- gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, ft);
- gen_load_fpr32(fp2, fr);
+ gen_load_fpr32(ctx, fp0, fs);
+ gen_load_fpr32(ctx, fp1, ft);
+ gen_load_fpr32(ctx, fp2, fr);
gen_helper_float_nmulsub_s(fp2, fp0, fp1, fp2);
tcg_temp_free_i32(fp0);
tcg_temp_free_i32(fp1);
- gen_store_fpr32(fp2, fd);
+ gen_store_fpr32(ctx, fp2, fd);
tcg_temp_free_i32(fp2);
}
opn = "nmsub.s";
@@ -10985,13 +10979,13 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
case MOVF_FMT:
switch (fmt) {
case FMT_SDPS_S:
- gen_movcf_s(rs, rt, cc, 0);
+ gen_movcf_s(ctx, rs, rt, cc, 0);
break;
case FMT_SDPS_D:
gen_movcf_d(ctx, rs, rt, cc, 0);
break;
case FMT_SDPS_PS:
- gen_movcf_ps(rs, rt, cc, 0);
+ gen_movcf_ps(ctx, rs, rt, cc, 0);
break;
default:
goto pool32f_invalid;
@@ -11000,13 +10994,13 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
case MOVT_FMT:
switch (fmt) {
case FMT_SDPS_S:
- gen_movcf_s(rs, rt, cc, 1);
+ gen_movcf_s(ctx, rs, rt, cc, 1);
break;
case FMT_SDPS_D:
gen_movcf_d(ctx, rs, rt, cc, 1);
break;
case FMT_SDPS_PS:
- gen_movcf_ps(rs, rt, cc, 1);
+ gen_movcf_ps(ctx, rs, rt, cc, 1);
break;
default:
goto pool32f_invalid;
The large mechanical change in support of a follow-on patch that changes the representation of the fp registers. Signed-off-by: Richard Henderson <rth@twiddle.net> --- target-mips/translate.c | 312 +++++++++++++++++++++++------------------------ 1 files changed, 153 insertions(+), 159 deletions(-)