From patchwork Wed Mar 28 00:32:17 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 149073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8F1C3B6EF1 for ; Wed, 28 Mar 2012 12:38:50 +1100 (EST) Received: from localhost ([::1]:51181 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SCgpn-00088m-QW for incoming@patchwork.ozlabs.org; Tue, 27 Mar 2012 20:33:55 -0400 Received: from eggs.gnu.org ([208.118.235.92]:33010) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SCgoe-0006NZ-Mc for qemu-devel@nongnu.org; Tue, 27 Mar 2012 20:32:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SCgoc-0008U1-5O for qemu-devel@nongnu.org; Tue, 27 Mar 2012 20:32:44 -0400 Received: from mail-yx0-f173.google.com ([209.85.213.173]:51293) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SCgob-0008TK-Ny for qemu-devel@nongnu.org; Tue, 27 Mar 2012 20:32:41 -0400 Received: by yenr5 with SMTP id r5so503816yen.4 for ; Tue, 27 Mar 2012 17:32:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=9g4zcJ81mISgDsRWi70a8S7tJDEL8azcmQojVe28gJw=; b=W9Qd6a+xOv/Hwol9KnDum76c8BhKPhZEQUN2I4H9hDx0M+TcFoz5hd21+c36u+vA/M 44kgW1QcA8NoENr/LzA2xWsgozntJJEevqneSCMk6MGrieVEfdZp7/YuoZ0pOS2mgMbT RzUjkcalq4IZBmtgHsdKxbwZ8lNMxPDoCwwSFf21vJ18jcsPcOcSaOA+LklqxTswQoh3 6huYNW7AIdQznNIeRv1ewuwnGegMkbW2iMy+6ERfb/5Ir6KL5zrNnho1WAgXXHPQMcXf I56KI4rG9RLrePBdUSvIsnr2qtEvZ8qcs0PSMFAI4Zn3Ks299FPf7CPjYT1L+nkDYHdn 9DeQ== Received: by 10.68.242.38 with SMTP id wn6mr57367425pbc.72.1332894759682; Tue, 27 Mar 2012 17:32:39 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id f5sm1418749pbe.26.2012.03.27.17.32.38 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 27 Mar 2012 17:32:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 27 Mar 2012 17:32:17 -0700 Message-Id: <1332894743-27418-9-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1332894743-27418-1-git-send-email-rth@twiddle.net> References: <1332894743-27418-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.213.173 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 08/14] tcg-sparc: Do not use a global register for AREG0. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use of "env" as a macro means constraining include file ordering a bit. Signed-off-by: Richard Henderson --- dyngen-exec.h | 17 +++++++---------- target-m68k/op_helper.c | 2 +- target-unicore32/op_helper.c | 2 +- target-xtensa/op_helper.c | 2 +- xtensa-semi.c | 2 +- 5 files changed, 11 insertions(+), 14 deletions(-) diff --git a/dyngen-exec.h b/dyngen-exec.h index 65fcb43..97fd32c 100644 --- a/dyngen-exec.h +++ b/dyngen-exec.h @@ -41,13 +41,8 @@ #elif defined(__mips__) #define AREG0 "s0" #elif defined(__sparc__) -#ifdef CONFIG_SOLARIS -#define AREG0 "g2" -#elif HOST_LONG_BITS == 64 -#define AREG0 "g5" -#else -#define AREG0 "g6" -#endif +/* Don't use a global register. Working around glibc clobbering these + global registers is more trouble than just using TLS. */ #elif defined(__s390__) #define AREG0 "r10" #elif defined(__alpha__) @@ -62,11 +57,13 @@ #error unsupported CPU #endif -#if defined(AREG0) +#ifdef AREG0 register CPUArchState *env asm(AREG0); #else -/* TODO: Try env = cpu_single_env. */ -extern CPUArchState *env; +/* Without a hard register, we can use the TLS variable instead. Note that + this macro interferes with the use of "env" in DEF_HELPER_N, thus targets + should always include "helper.h" before "dyngen-exec.h". */ +#define env cpu_single_env #endif #endif /* !CONFIG_TCG_PASS_AREG0 */ diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c index bc8c1f0..ef12f21 100644 --- a/target-m68k/op_helper.c +++ b/target-m68k/op_helper.c @@ -17,8 +17,8 @@ * License along with this library; if not, see . */ #include "cpu.h" -#include "dyngen-exec.h" #include "helpers.h" +#include "dyngen-exec.h" #if defined(CONFIG_USER_ONLY) diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c index 638a020..a6a68b3 100644 --- a/target-unicore32/op_helper.c +++ b/target-unicore32/op_helper.c @@ -8,8 +8,8 @@ * published by the Free Software Foundation. */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" +#include "dyngen-exec.h" #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index cdef0db..d709983 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -26,8 +26,8 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helpers.h" +#include "dyngen-exec.h" #include "host-utils.h" static void do_unaligned_access(target_ulong addr, int is_write, int is_user, diff --git a/xtensa-semi.c b/xtensa-semi.c index 5754b77..0c0e018 100644 --- a/xtensa-semi.c +++ b/xtensa-semi.c @@ -30,8 +30,8 @@ #include #include #include "cpu.h" -#include "dyngen-exec.h" #include "helpers.h" +#include "dyngen-exec.h" #include "qemu-log.h" enum {