From patchwork Sun Mar 25 22:27:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 148601 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B5503B6EF4 for ; Mon, 26 Mar 2012 10:05:59 +1100 (EST) Received: from localhost ([::1]:32982 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvwU-0005aF-OF for incoming@patchwork.ozlabs.org; Sun, 25 Mar 2012 18:29:42 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvj-0003sA-Ic for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SBvvf-0007wT-Cg for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:55 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:34267) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvf-0007uF-4K for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:51 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so6347893pbc.4 for ; Sun, 25 Mar 2012 15:28:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=S6nFLw33PAJZNI+AccekrgCn9zsSSSENTOadLjqs/0A=; b=vY/U6rljnwLPNSDB+P2yWClOyW7rT/QVsr0ZK67Z6y1tgm82LVp4ZFcP2X3A0LPSaB +cNMvKGR97LjXcH1FwgFKePA42aAncDzeYjmOnm23/FgxWIwE43eYxxn6vQlEryXnr+F pEpi2RlqF+SLaeqmbLtuoMiYrm6Pxaspwb7QH8HImT0NXEmE6At8hnZYa6LJxcjdmOJq y/5q/YS/GtZnq8H/79xnlUf1YlRZObqlNWanEEZFvWikJdE4Dz6kZmR59aVSzvtZtVCK /BUjSsxvGXfD0dYLn8J63Wu3RP7ne6D6NQWiAb0glzIYkWuBpMeoat/Dh7jQRkwK30XF R2Zw== Received: by 10.68.201.6 with SMTP id jw6mr48460830pbc.92.1332714530294; Sun, 25 Mar 2012 15:28:50 -0700 (PDT) Received: from pebble.com ([173.160.232.49]) by mx.google.com with ESMTPS id l4sm11018797pbl.27.2012.03.25.15.28.49 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 25 Mar 2012 15:28:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 25 Mar 2012 15:27:50 -0700 Message-Id: <1332714477-30079-9-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1332714477-30079-1-git-send-email-rth@twiddle.net> References: <1332714477-30079-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 08/15] Avoid declaring the env variable at all if CONFIG_TCG_PASS_AREG0. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- dyngen-exec.h | 5 +++++ user-exec.c | 17 ++++++++++++++--- 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/dyngen-exec.h b/dyngen-exec.h index cfeef99..65fcb43 100644 --- a/dyngen-exec.h +++ b/dyngen-exec.h @@ -19,6 +19,10 @@ #if !defined(__DYNGEN_EXEC_H__) #define __DYNGEN_EXEC_H__ +/* If the target has indicated that it does not need an AREG0, + don't declare the env variable at all, much less as a register. */ +#if !defined(CONFIG_TCG_PASS_AREG0) + #if defined(CONFIG_TCG_INTERPRETER) /* The TCG interpreter does not need a special register AREG0, * but it is possible to use one by defining AREG0. @@ -65,4 +69,5 @@ register CPUArchState *env asm(AREG0); extern CPUArchState *env; #endif +#endif /* !CONFIG_TCG_PASS_AREG0 */ #endif /* !defined(__DYNGEN_EXEC_H__) */ diff --git a/user-exec.c b/user-exec.c index cd905ff..e326104 100644 --- a/user-exec.c +++ b/user-exec.c @@ -58,7 +58,9 @@ void cpu_resume_from_signal(CPUArchState *env1, void *puc) struct sigcontext *uc = puc; #endif +#ifndef CONFIG_TCG_PASS_AREG0 env = env1; +#endif /* XXX: restore cpu registers saved in host registers */ @@ -74,8 +76,8 @@ void cpu_resume_from_signal(CPUArchState *env1, void *puc) sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); #endif } - env->exception_index = -1; - longjmp(env->jmp_env, 1); + env1->exception_index = -1; + longjmp(env1->jmp_env, 1); } /* 'pc' is the host PC at which the exception was raised. 'address' is @@ -89,9 +91,18 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, TranslationBlock *tb; int ret; + /* XXX: find a correct solution for multithread */ +#ifdef CONFIG_TCG_PASS_AREG0 + /* ??? While we no longer have a global env register, if PC is within + the code_gen_buffer then we know that env is within a known register + there, and we could have the signal handler extract that value. */ + CPUArchState *env = cpu_single_env; +#else if (cpu_single_env) { - env = cpu_single_env; /* XXX: find a correct solution for multithread */ + env = cpu_single_env; } +#endif + #if defined(DEBUG_SIGNAL) qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", pc, address, is_write, *(unsigned long *)old_set);