From patchwork Sun Mar 25 22:27:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 148593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1E723B6EF3 for ; Mon, 26 Mar 2012 09:29:12 +1100 (EST) Received: from localhost ([::1]:57911 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvx-0003uQ-SL for incoming@patchwork.ozlabs.org; Sun, 25 Mar 2012 18:29:09 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvf-0003eW-DG for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SBvvd-0007vs-8p for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:50 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:47227) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvc-0007uQ-W0 for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:49 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so6347946pbc.4 for ; Sun, 25 Mar 2012 15:28:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=rBa7ou/dMCzI+GZRtwNtdQ4n+AdQ6FnevCgD/eAIqAs=; b=HKiQGl9TAaBzM4D71PUZgJTxg+9fGDOb+7iXp6hhIp+2zDAuj2U5GAQQjn1g+RVM5W RnOTv6IanI4o7R9wPyUiQ6MN7RmTFxM+WqAt3uMzBGcUNsfErdE+VKBtb2a5moQAgE8y T0QNOfBnbuc+zO7U7UMjL6lun0CORNqKCOC8Eaw0V9SM2DrgQlP9/sj5aL5ruIYqvSB5 Qcvh1OQA9TbjiAxnmCHhCoy29vvNAv8eyCFci88kz1cr5WgyEFuF52UYD3Zori6NgLfF /8a1IrlxlZoB43N3x8Hme6b0Zu2ypzNimKg1ag2P7IRvoqeXIk0K3DRCvnG0AMcOeLdR ggvQ== Received: by 10.68.234.134 with SMTP id ue6mr48876566pbc.14.1332714528142; Sun, 25 Mar 2012 15:28:48 -0700 (PDT) Received: from pebble.com ([173.160.232.49]) by mx.google.com with ESMTPS id l4sm11018797pbl.27.2012.03.25.15.28.47 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 25 Mar 2012 15:28:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 25 Mar 2012 15:27:48 -0700 Message-Id: <1332714477-30079-7-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1332714477-30079-1-git-send-email-rth@twiddle.net> References: <1332714477-30079-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 06/15] tcg-sparc: Support GUEST_BASE. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- configure | 2 ++ tcg/sparc/tcg-target.c | 40 +++++++++++++++++++++++++++++----------- tcg/sparc/tcg-target.h | 2 ++ 3 files changed, 33 insertions(+), 11 deletions(-) diff --git a/configure b/configure index 7741ba9..a79a090 100755 --- a/configure +++ b/configure @@ -819,6 +819,7 @@ case "$cpu" in if test "$solaris" = "no" ; then QEMU_CFLAGS="-ffixed-g1 -ffixed-g6 $QEMU_CFLAGS" fi + host_guest_base="yes" ;; sparc64) LDFLAGS="-m64 $LDFLAGS" @@ -827,6 +828,7 @@ case "$cpu" in if test "$solaris" != "no" ; then QEMU_CFLAGS="-ffixed-g1 $QEMU_CFLAGS" fi + host_guest_base="yes" ;; s390) QEMU_CFLAGS="-m31 -march=z990 $QEMU_CFLAGS" diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 1b27626..9891648 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -59,6 +59,12 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { }; #endif +#ifdef CONFIG_USE_GUEST_BASE +# define TCG_GUEST_BASE_REG TCG_REG_I3 +#else +# define TCG_GUEST_BASE_REG TCG_REG_G0 +#endif + #ifdef CONFIG_TCG_PASS_AREG0 #define ARG_OFFSET 1 #else @@ -689,6 +695,14 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | INSN_IMM13(-(TCG_TARGET_STACK_MINFRAME + CPU_TEMP_BUF_NLONGS * (int)sizeof(long)))); + +#ifdef CONFIG_USE_GUEST_BASE + if (GUEST_BASE != 0) { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE); + tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + } +#endif + tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) | INSN_RS2(TCG_REG_G0)); tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0); @@ -819,8 +833,8 @@ static int tcg_out_tlb_load(TCGContext *s, int addrlo_idx, int mem_index, } #endif /* CONFIG_SOFTMMU */ -static void tcg_out_qemu_ld_direct(TCGContext *s, int addr, int datalo, - int datahi, int sizeop) +static void tcg_out_qemu_ld_direct(TCGContext *s, int addr, int addend, + int datalo, int datahi, int sizeop) { #ifdef TARGET_WORDS_BIGENDIAN static const int ld_opc[8] = { @@ -835,14 +849,14 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int addr, int datalo, if (TCG_TARGET_REG_BITS == 32 && sizeop == 3) { /* Load all 64-bits into an O/G register. */ int reg64 = (datalo < 16 ? datalo : TCG_REG_O0); - tcg_out_ldst_rr(s, reg64, addr, TCG_REG_G0, ld_opc[sizeop]); + tcg_out_ldst_rr(s, reg64, addr, addend, ld_opc[sizeop]); /* Move the two 32-bit pieces into the destination registers. */ tcg_out_arithi(s, datahi, reg64, 32, SHIFT_SRLX); if (reg64 != datalo) { tcg_out_mov(s, TCG_TYPE_I32, datalo, reg64); } } else { - tcg_out_ldst_rr(s, datalo, addr, TCG_REG_G0, ld_opc[sizeop]); + tcg_out_ldst_rr(s, datalo, addr, addend, ld_opc[sizeop]); } } @@ -869,7 +883,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) label_ptr, offsetof(CPUTLBEntry, addr_read)); /* TLB Hit. */ - tcg_out_qemu_ld_direct(s, addr_reg, datalo, datahi, opc); + tcg_out_qemu_ld_direct(s, addr_reg, TCG_REG_G0, datalo, datahi, opc); /* b,pt,n label1 */ label_ptr[1] = (uint32_t *)s->code_ptr; @@ -948,12 +962,14 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) tcg_out_arithi(s, TCG_REG_I5, addr_reg, 0, SHIFT_SRL); addr_reg = TCG_REG_I5; } - tcg_out_qemu_ld_direct(s, addr_reg, datalo, datahi, opc); + tcg_out_qemu_ld_direct(s, addr_reg, + (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0), + datalo, datahi, opc); #endif /* CONFIG_SOFTMMU */ } -static void tcg_out_qemu_st_direct(TCGContext *s, int addr, int datalo, - int datahi, int sizeop) +static void tcg_out_qemu_st_direct(TCGContext *s, int addr, int addend, + int datalo, int datahi, int sizeop) { #ifdef TARGET_WORDS_BIGENDIAN static const int st_opc[4] = { STB, STH, STW, STX }; @@ -967,7 +983,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int addr, int datalo, tcg_out_arith(s, TCG_REG_O0, TCG_REG_O0, TCG_REG_O2, ARITH_OR); datalo = TCG_REG_O0; } - tcg_out_ldst_rr(s, datalo, addr, TCG_REG_G0, st_opc[sizeop]); + tcg_out_ldst_rr(s, datalo, addr, addend, st_opc[sizeop]); } static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) @@ -992,7 +1008,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) label_ptr, offsetof(CPUTLBEntry, addr_write)); /* TLB Hit. */ - tcg_out_qemu_st_direct(s, addr_reg, datalo, datahi, opc); + tcg_out_qemu_st_direct(s, addr_reg, TCG_REG_G0, datalo, datahi, opc); /* b,pt,n label1 */ label_ptr[1] = (uint32_t *)s->code_ptr; @@ -1045,7 +1061,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) tcg_out_arithi(s, TCG_REG_I5, addr_reg, 0, SHIFT_SRL); addr_reg = TCG_REG_I5; } - tcg_out_qemu_st_direct(s, addr_reg, datalo, datahi, opc); + tcg_out_qemu_st_direct(s, addr_reg, + (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0), + datalo, datahi, opc); #endif /* CONFIG_SOFTMMU */ } diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 56742bf..e69dfc8 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -126,6 +126,8 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i64 0 #endif +#define TCG_TARGET_HAS_GUEST_BASE + /* Note: must be synced with dyngen-exec.h */ #ifdef CONFIG_SOLARIS #define TCG_AREG0 TCG_REG_G2