From patchwork Sun Mar 25 22:27:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 148606 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B289AB6F62 for ; Mon, 26 Mar 2012 10:14:10 +1100 (EST) Received: from localhost ([::1]:60341 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvwJ-00058c-71 for incoming@patchwork.ozlabs.org; Sun, 25 Mar 2012 18:29:31 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51048) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvve-0003dF-V8 for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SBvvc-0007vZ-CV for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:50 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:37809) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBvvb-0007uM-Vu for qemu-devel@nongnu.org; Sun, 25 Mar 2012 18:28:48 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so6347922pbc.4 for ; Sun, 25 Mar 2012 15:28:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=PV7yOaGWBg9UMsmgLYc2DYEIijDZYMbZhhZ/ha/wxCk=; b=EWfXvIRgOyGY00mYa9aMKgnPzux8SfDhhxnAmB/vUfXUwQyD8Or9jE+0i0UUqHYHqu ryuNAUEXP71FDAqfpZRuJCL3BtBRmYwFgU2T/WY/q0Iu37gJEfkQ539ypDf4lbGNUelc dIg7GeX5LjyBIV8rnK+EPtpk3z6jE3Jmr822bL7t2K4QJ1nDuIw0nZeUQ/6VY3keN0O3 iJrPSiBqLevCQnBRKlqFv6Rjj3vefrv1dNOcGGTLdUf8w+5Bm796Ox9cPe8Vb39Ur0OY Al6lg6ifMZ7C5RuYUqOA9pL+k1qzM0L/yU5d8HLywTWaVC/TJ2mFvmZNMNVLu4UzMgOo 3xpg== Received: by 10.68.195.3 with SMTP id ia3mr47974393pbc.20.1332714527144; Sun, 25 Mar 2012 15:28:47 -0700 (PDT) Received: from pebble.com ([173.160.232.49]) by mx.google.com with ESMTPS id l4sm11018797pbl.27.2012.03.25.15.28.46 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 25 Mar 2012 15:28:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 25 Mar 2012 15:27:47 -0700 Message-Id: <1332714477-30079-6-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1332714477-30079-1-git-send-email-rth@twiddle.net> References: <1332714477-30079-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 05/15] tcg-sparc: Simplify qemu_ld/st direct memory paths. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Given that we have an opcode for all sizes, all endianness, turn the functions into a simple table lookup. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 209 +++++++++++++----------------------------------- 1 files changed, 56 insertions(+), 153 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 8763b03..1b27626 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -294,6 +294,16 @@ static inline int tcg_target_const_match(tcg_target_long val, #define ASI_PRIMARY_LITTLE 0x88 #endif +#define LDUH_LE (LDUHA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define LDSH_LE (LDSHA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define LDUW_LE (LDUWA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define LDSW_LE (LDSWA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define LDX_LE (LDXA | INSN_ASI(ASI_PRIMARY_LITTLE)) + +#define STH_LE (STHA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define STW_LE (STWA | INSN_ASI(ASI_PRIMARY_LITTLE)) +#define STX_LE (STXA | INSN_ASI(ASI_PRIMARY_LITTLE)) + static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2, int op) { @@ -366,66 +376,46 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type, } } -static inline void tcg_out_ld_raw(TCGContext *s, int ret, - tcg_target_long arg) +static inline void tcg_out_ldst_rr(TCGContext *s, int data, int a1, + int a2, int op) { - tcg_out_sethi(s, ret, arg); - tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) | - INSN_IMM13(arg & 0x3ff)); + tcg_out32(s, op | INSN_RD(data) | INSN_RS1(a1) | INSN_RS2(a2)); } -static inline void tcg_out_ld_ptr(TCGContext *s, int ret, - tcg_target_long arg) +static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, + int offset, int op) { - if (!check_fit_tl(arg, 10)) - tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ffULL); - if (TCG_TARGET_REG_BITS == 64) { - tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) | - INSN_IMM13(arg & 0x3ff)); - } else { - tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) | - INSN_IMM13(arg & 0x3ff)); - } -} - -static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, int offset, int op) -{ - if (check_fit_tl(offset, 13)) + if (check_fit_tl(offset, 13)) { tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) | INSN_IMM13(offset)); - else { + } else { tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset); - tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) | - INSN_RS2(addr)); + tcg_out_ldst_rr(s, ret, addr, TCG_REG_I5, op); } } -static inline void tcg_out_ldst_asi(TCGContext *s, int ret, int addr, - int offset, int op, int asi) -{ - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset); - tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) | - INSN_ASI(asi) | INSN_RS2(addr)); -} - static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, tcg_target_long arg2) { - if (type == TCG_TYPE_I32) - tcg_out_ldst(s, ret, arg1, arg2, LDUW); - else - tcg_out_ldst(s, ret, arg1, arg2, LDX); + tcg_out_ldst(s, ret, arg1, arg2, (type == TCG_TYPE_I32 ? LDUW : LDX)); } static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, tcg_target_long arg2) { - if (type == TCG_TYPE_I32) - tcg_out_ldst(s, arg, arg1, arg2, STW); - else - tcg_out_ldst(s, arg, arg1, arg2, STX); + tcg_out_ldst(s, arg, arg1, arg2, (type == TCG_TYPE_I32 ? STW : STX)); } +static inline void tcg_out_ld_ptr(TCGContext *s, int ret, + tcg_target_long arg) +{ + if (!check_fit_tl(arg, 10)) { + tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff); + } + tcg_out_ld(s, TCG_TYPE_PTR, ret, ret, arg & 0x3ff); +} + + static inline void tcg_out_sety(TCGContext *s, int rs) { tcg_out32(s, WRY | INSN_RS1(TCG_REG_G0) | INSN_RS2(rs)); @@ -833,76 +823,26 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int addr, int datalo, int datahi, int sizeop) { #ifdef TARGET_WORDS_BIGENDIAN - const int bigendian = 1; + static const int ld_opc[8] = { + LDUB, LDUH, LDUW, LDX, LDSB, LDSH, LDSW, LDX + }; #else - const int bigendian = 0; + static const int ld_opc[8] = { + LDUB, LDUH_LE, LDUW_LE, LDX_LE, LDSB, LDSH_LE, LDSW_LE, LDX_LE + }; #endif - switch (sizeop) { - case 0: - /* ldub [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDUB); - break; - case 0 | 4: - /* ldsb [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDSB); - break; - case 1: - if (bigendian) { - /* lduh [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDUH); - } else { - /* lduha [addr] ASI_PRIMARY_LITTLE, datalo */ - tcg_out_ldst_asi(s, datalo, addr, 0, LDUHA, ASI_PRIMARY_LITTLE); - } - break; - case 1 | 4: - if (bigendian) { - /* ldsh [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDSH); - } else { - /* ldsha [addr] ASI_PRIMARY_LITTLE, datalo */ - tcg_out_ldst_asi(s, datalo, addr, 0, LDSHA, ASI_PRIMARY_LITTLE); - } - break; - case 2: - if (bigendian) { - /* lduw [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDUW); - } else { - /* lduwa [addr] ASI_PRIMARY_LITTLE, datalo */ - tcg_out_ldst_asi(s, datalo, addr, 0, LDUWA, ASI_PRIMARY_LITTLE); - } - break; - case 2 | 4: - if (bigendian) { - /* ldsw [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDSW); - } else { - /* ldswa [addr] ASI_PRIMARY_LITTLE, datalo */ - tcg_out_ldst_asi(s, datalo, addr, 0, LDSWA, ASI_PRIMARY_LITTLE); - } - break; - case 3: - if (TCG_TARGET_REG_BITS == 64) { - if (bigendian) { - /* ldx [addr], datalo */ - tcg_out_ldst(s, datalo, addr, 0, LDX); - } else { - /* ldxa [addr] ASI_PRIMARY_LITTLE, datalo */ - tcg_out_ldst_asi(s, datalo, addr, 0, LDXA, ASI_PRIMARY_LITTLE); - } - } else { - if (bigendian) { - tcg_out_ldst(s, datahi, addr, 0, LDUW); - tcg_out_ldst(s, datalo, addr, 4, LDUW); - } else { - tcg_out_ldst_asi(s, datalo, addr, 0, LDUWA, ASI_PRIMARY_LITTLE); - tcg_out_ldst_asi(s, datahi, addr, 4, LDUWA, ASI_PRIMARY_LITTLE); - } + + if (TCG_TARGET_REG_BITS == 32 && sizeop == 3) { + /* Load all 64-bits into an O/G register. */ + int reg64 = (datalo < 16 ? datalo : TCG_REG_O0); + tcg_out_ldst_rr(s, reg64, addr, TCG_REG_G0, ld_opc[sizeop]); + /* Move the two 32-bit pieces into the destination registers. */ + tcg_out_arithi(s, datahi, reg64, 32, SHIFT_SRLX); + if (reg64 != datalo) { + tcg_out_mov(s, TCG_TYPE_I32, datalo, reg64); } - break; - default: - tcg_abort(); + } else { + tcg_out_ldst_rr(s, datalo, addr, TCG_REG_G0, ld_opc[sizeop]); } } @@ -1016,55 +956,18 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int addr, int datalo, int datahi, int sizeop) { #ifdef TARGET_WORDS_BIGENDIAN - const int bigendian = 1; + static const int st_opc[4] = { STB, STH, STW, STX }; #else - const int bigendian = 0; + static const int st_opc[4] = { STB, STH_LE, STW_LE, STX_LE }; #endif - switch (sizeop) { - case 0: - /* stb datalo, [addr] */ - tcg_out_ldst(s, datalo, addr, 0, STB); - break; - case 1: - if (bigendian) { - /* sth datalo, [addr] */ - tcg_out_ldst(s, datalo, addr, 0, STH); - } else { - /* stha datalo, [addr] ASI_PRIMARY_LITTLE */ - tcg_out_ldst_asi(s, datalo, addr, 0, STHA, ASI_PRIMARY_LITTLE); - } - break; - case 2: - if (bigendian) { - /* stw datalo, [addr] */ - tcg_out_ldst(s, datalo, addr, 0, STW); - } else { - /* stwa datalo, [addr] ASI_PRIMARY_LITTLE */ - tcg_out_ldst_asi(s, datalo, addr, 0, STWA, ASI_PRIMARY_LITTLE); - } - break; - case 3: - if (TCG_TARGET_REG_BITS == 64) { - if (bigendian) { - /* stx datalo, [addr] */ - tcg_out_ldst(s, datalo, addr, 0, STX); - } else { - /* stxa datalo, [addr] ASI_PRIMARY_LITTLE */ - tcg_out_ldst_asi(s, datalo, addr, 0, STXA, ASI_PRIMARY_LITTLE); - } - } else { - if (bigendian) { - tcg_out_ldst(s, datahi, addr, 0, STW); - tcg_out_ldst(s, datalo, addr, 4, STW); - } else { - tcg_out_ldst_asi(s, datalo, addr, 0, STWA, ASI_PRIMARY_LITTLE); - tcg_out_ldst_asi(s, datahi, addr, 4, STWA, ASI_PRIMARY_LITTLE); - } - } - break; - default: - tcg_abort(); + + if (TCG_TARGET_REG_BITS == 32 && sizeop == 3) { + tcg_out_arithi(s, TCG_REG_O0, datalo, 0, SHIFT_SRL); + tcg_out_arithi(s, TCG_REG_O2, datahi, 32, SHIFT_SLLX); + tcg_out_arith(s, TCG_REG_O0, TCG_REG_O0, TCG_REG_O2, ARITH_OR); + datalo = TCG_REG_O0; } + tcg_out_ldst_rr(s, datalo, addr, TCG_REG_G0, st_opc[sizeop]); } static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)