@@ -96,8 +96,6 @@ target_phys_addr_t omap_l4_attach(struct omap_target_agent_s *ta, int region,
int iotype);
target_phys_addr_t omap_l4_region_base(struct omap_target_agent_s *ta,
int region);
-int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
- CPUWriteMemoryFunc * const *mem_write, void *opaque);
/* OMAP2 SDRAM controller */
struct omap_sdrc_s;
@@ -784,8 +784,8 @@ static void omap_sti_fifo_write(void *opaque, target_phys_addr_t addr,
s->chr = chr ?: qemu_chr_new("null", "null", NULL);
- iomemtype = l4_register_io_memory(omap_sti_readfn,
- omap_sti_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_sti_readfn,
+ omap_sti_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
iomemtype = cpu_register_io_memory(omap_sti_fifo_readfn,
@@ -1798,8 +1798,8 @@ static void omap_prcm_coldreset(struct omap_prcm_s *s)
s->mpu = mpu;
omap_prcm_coldreset(s);
- iomemtype = l4_register_io_memory(omap_prcm_readfn,
- omap_prcm_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_prcm_readfn,
+ omap_prcm_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
omap_l4_attach(ta, 1, iomemtype);
@@ -2168,8 +2168,8 @@ static void omap_sysctl_reset(struct omap_sysctl_s *s)
s->mpu = mpu;
omap_sysctl_reset(s);
- iomemtype = l4_register_io_memory(omap_sysctl_readfn,
- omap_sysctl_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_sysctl_readfn,
+ omap_sysctl_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
return s;
@@ -1037,14 +1037,14 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
s->drq = drq;
omap_dss_reset(s);
- iomemtype[0] = l4_register_io_memory(omap_diss1_readfn,
- omap_diss1_writefn, s);
- iomemtype[1] = l4_register_io_memory(omap_disc1_readfn,
- omap_disc1_writefn, s);
- iomemtype[2] = l4_register_io_memory(omap_rfbi1_readfn,
- omap_rfbi1_writefn, s);
- iomemtype[3] = l4_register_io_memory(omap_venc1_readfn,
- omap_venc1_writefn, s);
+ iomemtype[0] = cpu_register_io_memory(omap_diss1_readfn,
+ omap_diss1_writefn, s, DEVICE_NATIVE_ENDIAN);
+ iomemtype[1] = cpu_register_io_memory(omap_disc1_readfn,
+ omap_disc1_writefn, s, DEVICE_NATIVE_ENDIAN);
+ iomemtype[2] = cpu_register_io_memory(omap_rfbi1_readfn,
+ omap_rfbi1_writefn, s, DEVICE_NATIVE_ENDIAN);
+ iomemtype[3] = cpu_register_io_memory(omap_venc1_readfn,
+ omap_venc1_writefn, s, DEVICE_NATIVE_ENDIAN);
iomemtype[4] = cpu_register_io_memory(omap_im3_readfn,
omap_im3_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype[0]);
@@ -476,8 +476,8 @@ struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
omap_gp_timer_reset(s);
omap_gp_timer_clk_setup(s);
- iomemtype = l4_register_io_memory(omap_gp_timer_readfn,
- omap_gp_timer_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_gp_timer_readfn,
+ omap_gp_timer_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
return s;
@@ -457,8 +457,8 @@ struct omap_i2c_s *omap2_i2c_init(struct omap_target_agent_s *ta,
s->bus = i2c_init_bus(NULL, "i2c");
omap_i2c_reset(s);
- iomemtype = l4_register_io_memory(omap_i2c_readfn,
- omap_i2c_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_i2c_readfn,
+ omap_i2c_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
return s;
@@ -20,14 +20,6 @@
#include "hw.h"
#include "omap.h"
-int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
- CPUWriteMemoryFunc * const *mem_write,
- void *opaque)
-{
- return cpu_register_io_memory(mem_read, mem_write, opaque,
- DEVICE_NATIVE_ENDIAN);
-}
-
struct omap_l4_s {
target_phys_addr_t base;
int ta_num;
@@ -132,8 +124,8 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
ta->status = 0x00000000;
ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
- iomemtype = l4_register_io_memory(omap_l4ta_readfn,
- omap_l4ta_writefn, ta);
+ iomemtype = cpu_register_io_memory(omap_l4ta_readfn,
+ omap_l4ta_writefn, ta, DEVICE_NATIVE_ENDIAN);
ta->base = omap_l4_attach(ta, info->ta_region, iomemtype);
return ta;
@@ -612,8 +612,8 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta,
omap_mmc_reset(s);
- iomemtype = l4_register_io_memory(omap_mmc_readfn,
- omap_mmc_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_mmc_readfn,
+ omap_mmc_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
/* Instantiate the storage */
@@ -327,8 +327,8 @@ struct omap_mcspi_s *omap_mcspi_init(struct omap_target_agent_s *ta, int chnum,
}
omap_mcspi_reset(s);
- iomemtype = l4_register_io_memory(omap_mcspi_readfn,
- omap_mcspi_writefn, s);
+ iomemtype = cpu_register_io_memory(omap_mcspi_readfn,
+ omap_mcspi_writefn, s, DEVICE_NATIVE_ENDIAN);
omap_l4_attach(ta, 0, iomemtype);
return s;
@@ -89,8 +89,9 @@ struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
omap_synctimer_reset(s);
- omap_l4_attach(ta, 0, l4_register_io_memory(
- omap_synctimer_readfn, omap_synctimer_writefn, s));
+ omap_l4_attach(ta, 0, cpu_register_io_memory(
+ omap_synctimer_readfn, omap_synctimer_writefn, s,
+ DEVICE_NATIVE_ENDIAN));
return s;
}
@@ -107,6 +107,7 @@ static void omap_tap_write(void *opaque, target_phys_addr_t addr,
void omap_tap_init(struct omap_target_agent_s *ta,
struct omap_mpu_state_s *mpu)
{
- omap_l4_attach(ta, 0, l4_register_io_memory(
- omap_tap_readfn, omap_tap_writefn, mpu));
+ omap_l4_attach(ta, 0, cpu_register_io_memory(
+ omap_tap_readfn, omap_tap_writefn, mpu,
+ DEVICE_NATIVE_ENDIAN));
}
This is a trivial wrapper around cpu_register_io_memory(), adding no value. Inline it into all callers. Signed-off-by: Avi Kivity <avi@redhat.com> --- hw/omap.h | 2 -- hw/omap2.c | 12 ++++++------ hw/omap_dss.c | 16 ++++++++-------- hw/omap_gptimer.c | 4 ++-- hw/omap_i2c.c | 4 ++-- hw/omap_l4.c | 12 ++---------- hw/omap_mmc.c | 4 ++-- hw/omap_spi.c | 4 ++-- hw/omap_synctimer.c | 5 +++-- hw/omap_tap.c | 5 +++-- 10 files changed, 30 insertions(+), 38 deletions(-)