@@ -54,16 +54,6 @@ static int vga_initfn(ISADevice *dev)
isa_mem_base + 0x000a0000,
vga_io_memory, 1);
memory_region_set_coalescing(vga_io_memory);
- isa_init_ioport(dev, 0x3c0);
- isa_init_ioport(dev, 0x3b4);
- isa_init_ioport(dev, 0x3ba);
- isa_init_ioport(dev, 0x3da);
- isa_init_ioport(dev, 0x3c0);
-#ifdef CONFIG_BOCHS_VBE
- isa_init_ioport(dev, 0x1ce);
- isa_init_ioport(dev, 0x1cf);
- isa_init_ioport(dev, 0x1d0);
-#endif /* CONFIG_BOCHS_VBE */
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
@@ -2198,40 +2198,47 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
vga_dirty_log_start(s);
}
-/* used by both ISA and PCI */
+static const MemoryRegionPortio vga_portio_list[] = {
+ { 0x04, 2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3b4 */
+ PORTIO_END_OF_LIST(),
+ { 0x0a, 1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3ba */
+ PORTIO_END_OF_LIST(),
+ { 0x10, 16, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3c0 */
+ PORTIO_END_OF_LIST(),
+ { 0x14, 2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3d4 */
+ PORTIO_END_OF_LIST(),
+ { 0x1a, 1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3da */
+ PORTIO_END_OF_LIST(),
+ PORTIO_END_OF_LIST(),
+};
+
+#ifdef CONFIG_BOCHS_VBE
+static const MemoryRegionPortio vbe_portio_list[] = {
+# ifdef TARGET_I386
+ { 0, 1, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
+ { 1, 1, 2, .read = vbe_ioport_read_data, .write = vbe_ioport_write_data },
+# else
+ { 0, 2, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
+ { 2, 2, 2, .read = vbe_ioport_read_data, .write = vbe_ioport_write_data },
+# endif
+ PORTIO_END_OF_LIST(),
+ PORTIO_END_OF_LIST(),
+};
+#endif /* CONFIG_BOCHS_VBE */
+
+/* Used by both ISA and PCI */
MemoryRegion *vga_init_io(VGACommonState *s)
{
MemoryRegion *vga_mem;
- register_ioport_write(0x3c0, 16, 1, vga_ioport_write, s);
-
- register_ioport_write(0x3b4, 2, 1, vga_ioport_write, s);
- register_ioport_write(0x3d4, 2, 1, vga_ioport_write, s);
- register_ioport_write(0x3ba, 1, 1, vga_ioport_write, s);
- register_ioport_write(0x3da, 1, 1, vga_ioport_write, s);
-
- register_ioport_read(0x3c0, 16, 1, vga_ioport_read, s);
-
- register_ioport_read(0x3b4, 2, 1, vga_ioport_read, s);
- register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s);
- register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s);
- register_ioport_read(0x3da, 1, 1, vga_ioport_read, s);
+ /* The PCI-ISA bridge should have been configured properly such that
+ this works for PCI devices as well. This only supports one bridge,
+ but "secondary" VGA cards are generally accessed by MMIO only anyway. */
+ isa_register_old_portio_list(NULL, 0x3b0, vga_portio_list, s, "vga");
#ifdef CONFIG_BOCHS_VBE
-#if defined (TARGET_I386)
- register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
- register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data, s);
-
- register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
- register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data, s);
-#else
- register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
- register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data, s);
-
- register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
- register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data, s);
+ isa_register_old_portio_list(NULL, 0x1ce, vbe_portio_list, s, "vbe");
#endif
-#endif /* CONFIG_BOCHS_VBE */
vga_mem = qemu_malloc(sizeof(*vga_mem));
memory_region_init_io(vga_mem, &vga_mem_ops, s,
Signed-off-by: Richard Henderson <rth@twiddle.net> --- hw/vga-isa.c | 10 --------- hw/vga.c | 61 ++++++++++++++++++++++++++++++++------------------------- 2 files changed, 34 insertions(+), 37 deletions(-)