@@ -57,7 +57,7 @@ static void connex_init(MemoryRegion *address_space_mem,
uint32_t connex_rom = 0x01000000;
uint32_t connex_ram = 0x04000000;
- cpu = pxa255_init(connex_ram);
+ cpu = pxa255_init(address_space_mem, connex_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
@@ -100,7 +100,7 @@ static void verdex_init(MemoryRegion *address_space_mem,
uint32_t verdex_rom = 0x02000000;
uint32_t verdex_ram = 0x10000000;
- cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");
+ cpu = pxa270_init(address_space_mem, verdex_ram, cpu_model ?: "pxa270-c0");
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
@@ -111,7 +111,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
cpu_model = "pxa270-c5";
/* Setup CPU & memory */
- cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
@@ -9,6 +9,8 @@
#ifndef PXA_H
# define PXA_H "pxa.h"
+#include "memory.h"
+
/* Interrupt numbers */
# define PXA2XX_PIC_SSP3 0
# define PXA2XX_PIC_USBH2 2
@@ -173,7 +175,8 @@ struct PXA2xxI2SState {
# define PA_FMT "0x%08lx"
# define REG_FMT "0x" TARGET_FMT_plx
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
-PXA2xxState *pxa255_init(unsigned int sdram_size);
+PXA2xxState *pxa270_init(MemoryRegion *address_space, unsigned int sdram_size,
+ const char *revision);
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size);
#endif /* PXA_H */
@@ -15,7 +15,6 @@
#include "ssi.h"
#include "qemu-char.h"
#include "blockdev.h"
-#include "exec-memory.h"
static struct {
target_phys_addr_t io_base;
@@ -2060,7 +2059,8 @@ static void pxa2xx_reset(void *opaque, int line, int level)
}
/* Initialise a PXA270 integrated chip (ARM based core). */
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
+PXA2xxState *pxa270_init(MemoryRegion *address_space,
+ unsigned int sdram_size, const char *revision)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2116,7 +2116,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
for (i = 0; pxa270_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -2199,7 +2199,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
}
/* Initialise a PXA255 integrated chip (ARM based core). */
-PXA2xxState *pxa255_init(unsigned int sdram_size)
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2248,7 +2248,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -907,7 +907,7 @@ static void spitz_common_init(MemoryRegion *address_space_mem,
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
/* Setup CPU & memory */
- cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
@@ -219,7 +219,7 @@ static void tosa_init(MemoryRegion *address_space_mem,
if (!cpu_model)
cpu_model = "pxa255";
- cpu = pxa255_init(tosa_binfo.ram_size);
+ cpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
cpu_register_physical_memory(0, TOSA_ROM,
qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
@@ -294,7 +294,7 @@ static void z2_init(MemoryRegion *address_space_mem,
}
/* Setup CPU & memory */
- cpu = pxa270_init(z2_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, z2_binfo.ram_size, cpu_model);
#ifdef TARGET_WORDS_BIGENDIAN
flash_ops = &pflash_cfi01_ops_be;
Signed-off-by: Richard Henderson <rth@twiddle.net> --- hw/gumstix.c | 4 ++-- hw/mainstone.c | 2 +- hw/pxa.h | 7 +++++-- hw/pxa2xx.c | 10 +++++----- hw/spitz.c | 2 +- hw/tosa.c | 2 +- hw/z2.c | 2 +- 7 files changed, 16 insertions(+), 13 deletions(-)