From patchwork Thu Jun 9 10:45:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Batuzov X-Patchwork-Id: 99725 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id AB52AB6FB9 for ; Thu, 9 Jun 2011 21:03:51 +1000 (EST) Received: from localhost ([::1]:59803 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUd1f-0001AO-NF for incoming@patchwork.ozlabs.org; Thu, 09 Jun 2011 07:03:48 -0400 Received: from eggs.gnu.org ([140.186.70.92]:47204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUckg-0005eb-6A for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QUcke-0008D1-JI for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:13 -0400 Received: from smtp.ispras.ru ([83.149.198.202]:52098) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUckd-0008CK-VP for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:12 -0400 Received: from ispserv.ispras.ru (ispserv.ispras.ru [83.149.198.72]) by smtp.ispras.ru (Postfix) with ESMTP id BFDD75D4146; Thu, 9 Jun 2011 14:41:04 +0400 (MSD) Received: from bulbul.intra.ispras.ru (winnie.ispras.ru [83.149.198.236]) by ispserv.ispras.ru (Postfix) with ESMTP id 256243FC5B; Thu, 9 Jun 2011 14:45:59 +0400 (MSD) From: Kirill Batuzov To: qemu-devel@nongnu.org Date: Thu, 9 Jun 2011 14:45:44 +0400 Message-Id: <1307616344-27161-7-git-send-email-batuzovk@ispras.ru> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307616344-27161-1-git-send-email-batuzovk@ispras.ru> References: <1307616344-27161-1-git-send-email-batuzovk@ispras.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 83.149.198.202 Cc: zhur@ispras.ru Subject: [Qemu-devel] [PATCH v2 6/6] Do constant folding for unary operations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Perform constant folding for NOT and EXT{8,16,32}{S,U} operations. Signed-off-by: Kirill Batuzov --- tcg/optimize.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 83 insertions(+), 0 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 653f399..2cdcc29 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -100,6 +100,11 @@ static int op_bits(int op) case INDEX_op_sar_i32: case INDEX_op_rotl_i32: case INDEX_op_rotr_i32: + case INDEX_op_not_i32: + case INDEX_op_ext8s_i32: + case INDEX_op_ext16s_i32: + case INDEX_op_ext8u_i32: + case INDEX_op_ext16u_i32: return 32; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_mov_i64: @@ -114,6 +119,13 @@ static int op_bits(int op) case INDEX_op_sar_i64: case INDEX_op_rotl_i64: case INDEX_op_rotr_i64: + case INDEX_op_not_i64: + case INDEX_op_ext8s_i64: + case INDEX_op_ext16s_i64: + case INDEX_op_ext32s_i64: + case INDEX_op_ext8u_i64: + case INDEX_op_ext16u_i64: + case INDEX_op_ext32u_i64: return 64; #endif default: @@ -243,6 +255,44 @@ static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y) return x; #endif + case INDEX_op_not_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_not_i64: +#endif + return ~x; + + case INDEX_op_ext8s_i32: + return (int32_t)(int8_t)x; + + case INDEX_op_ext16s_i32: + return (int32_t)(int16_t)x; + + case INDEX_op_ext8u_i32: + return (uint32_t)(uint8_t)x; + + case INDEX_op_ext16u_i32: + return (uint32_t)(uint16_t)x; + +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_ext8s_i64: + return (int64_t)(int8_t)x; + + case INDEX_op_ext16s_i64: + return (int64_t)(int16_t)x; + + case INDEX_op_ext32s_i64: + return (int64_t)(int32_t)x; + + case INDEX_op_ext8u_i64: + return (uint64_t)(uint8_t)x; + + case INDEX_op_ext16u_i64: + return (uint64_t)(uint16_t)x; + + case INDEX_op_ext32u_i64: + return (uint64_t)(uint32_t)x; +#endif + default: fprintf(stderr, "Unrecognized operation %d in do_constant_folding.\n", op); @@ -447,6 +497,39 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, gen_args += 2; args += 2; break; + case INDEX_op_not_i32: + case INDEX_op_ext8s_i32: + case INDEX_op_ext16s_i32: + case INDEX_op_ext8u_i32: + case INDEX_op_ext16u_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_not_i64: + case INDEX_op_ext8s_i64: + case INDEX_op_ext16s_i64: + case INDEX_op_ext32s_i64: + case INDEX_op_ext8u_i64: + case INDEX_op_ext16u_i64: + case INDEX_op_ext32u_i64: +#endif + if (temps[args[1]].state == TCG_TEMP_CONST) { + gen_opc_buf[op_index] = op_to_movi(op); + gen_args[0] = args[0]; + gen_args[1] = do_constant_folding(op, temps[args[1]].val, 0); + reset_temp(temps, gen_args[0], nb_temps, nb_globals); + temps[gen_args[0]].state = TCG_TEMP_CONST; + temps[gen_args[0]].val = gen_args[1]; + assert(temps[gen_args[0]].num_copies == 0); + gen_args += 2; + args += 2; + break; + } else { + reset_temp(temps, args[0], nb_temps, nb_globals); + gen_args[0] = args[0]; + gen_args[1] = args[1]; + gen_args += 2; + args += 2; + break; + } case INDEX_op_or_i32: case INDEX_op_and_i32: case INDEX_op_xor_i32: