From patchwork Thu Jun 9 10:45:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Batuzov X-Patchwork-Id: 99720 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DCB0AB6FEA for ; Thu, 9 Jun 2011 20:50:04 +1000 (EST) Received: from localhost ([::1]:34196 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUcoK-0005j4-OM for incoming@patchwork.ozlabs.org; Thu, 09 Jun 2011 06:50:01 -0400 Received: from eggs.gnu.org ([140.186.70.92]:47299) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUcko-0005hg-Tc for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QUckm-0008FZ-V6 for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:22 -0400 Received: from smtp.ispras.ru ([83.149.198.202]:52092) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUckm-0008AS-36 for qemu-devel@nongnu.org; Thu, 09 Jun 2011 06:46:20 -0400 Received: from ispserv.ispras.ru (ispserv.ispras.ru [83.149.198.72]) by smtp.ispras.ru (Postfix) with ESMTP id E7C255D4143; Thu, 9 Jun 2011 14:41:03 +0400 (MSD) Received: from bulbul.intra.ispras.ru (winnie.ispras.ru [83.149.198.236]) by ispserv.ispras.ru (Postfix) with ESMTP id E02B83FC5C; Thu, 9 Jun 2011 14:45:57 +0400 (MSD) From: Kirill Batuzov To: qemu-devel@nongnu.org Date: Thu, 9 Jun 2011 14:45:41 +0400 Message-Id: <1307616344-27161-4-git-send-email-batuzovk@ispras.ru> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307616344-27161-1-git-send-email-batuzovk@ispras.ru> References: <1307616344-27161-1-git-send-email-batuzovk@ispras.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 83.149.198.202 Cc: zhur@ispras.ru Subject: [Qemu-devel] [PATCH v2 3/6] Do constant folding for basic arithmetic operations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Perform actual constant folding for ADD, SUB and MUL operations. Signed-off-by: Kirill Batuzov --- tcg/optimize.c | 156 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 156 insertions(+), 0 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 7996798..29da6fa 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -89,9 +89,15 @@ static int op_bits(int op) { switch (op) { case INDEX_op_mov_i32: + case INDEX_op_add_i32: + case INDEX_op_sub_i32: + case INDEX_op_mul_i32: return 32; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_mov_i64: + case INDEX_op_add_i64: + case INDEX_op_sub_i64: + case INDEX_op_mul_i64: return 64; #endif default: @@ -113,6 +119,58 @@ static int op_to_movi(int op) tcg_abort(); } +static int op_to_mov(int op) +{ + if (op_bits(op) == 32) { + return INDEX_op_mov_i32; + } +#if TCG_TARGET_REG_BITS == 64 + if (op_bits(op) == 64) { + return INDEX_op_mov_i64; + } +#endif + tcg_abort(); +} + +static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y) +{ + switch (op) { + case INDEX_op_add_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_add_i64: +#endif + return x + y; + + case INDEX_op_sub_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_sub_i64: +#endif + return x - y; + + case INDEX_op_mul_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_mul_i64: +#endif + return x * y; + + default: + fprintf(stderr, + "Unrecognized operation %d in do_constant_folding.\n", op); + tcg_abort(); + } +} + +static TCGArg do_constant_folding(int op, TCGArg x, TCGArg y) +{ + TCGArg res = do_constant_folding_2(op, x, y); +#if TCG_TARGET_REG_BITS == 64 + if (op_bits(op) == 32) { + res &= 0xffffffff; + } +#endif + return res; +} + /* Propagate constants and copies, fold constant expressions. */ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args, TCGOpDef *tcg_op_defs) @@ -120,6 +178,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, int i, nb_ops, op_index, op, nb_temps, nb_globals; const TCGOpDef *def; TCGArg *gen_args; + TCGArg tmp; /* Array VALS has an element for each temp. If this temp holds a constant then its value is kept in VALS' element. If this temp is a copy of other ones then this equivalence class' @@ -149,6 +208,72 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, } } + /* Simplify expression if possible. */ + switch (op) { + case INDEX_op_add_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_add_i64: +#endif + if (temps[args[1]].state == TCG_TEMP_CONST) { + /* 0 + x == x + 0 */ + tmp = args[1]; + args[1] = args[2]; + args[2] = tmp; + } + /* Fallthrough */ + case INDEX_op_sub_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_sub_i64: +#endif + if (temps[args[1]].state == TCG_TEMP_CONST) { + /* Proceed with possible constant folding. */ + break; + } + if (temps[args[2]].state == TCG_TEMP_CONST + && temps[args[2]].val == 0) { + if ((temps[args[0]].state == TCG_TEMP_COPY + && temps[args[0]].val == args[1]) + || args[0] == args[1]) { + args += 3; + gen_opc_buf[op_index] = INDEX_op_nop; + } else { + reset_temp(temps, args[0], nb_temps, nb_globals); + if (args[1] >= s->nb_globals) { + temps[args[0]].state = TCG_TEMP_COPY; + temps[args[0]].val = args[1]; + temps[args[1]].num_copies++; + } + gen_opc_buf[op_index] = op_to_mov(op); + gen_args[0] = args[0]; + gen_args[1] = args[1]; + gen_args += 2; + args += 3; + } + continue; + } + break; + case INDEX_op_mul_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_mul_i64: +#endif + if ((temps[args[1]].state == TCG_TEMP_CONST + && temps[args[1]].val == 0) + || (temps[args[2]].state == TCG_TEMP_CONST + && temps[args[2]].val == 0)) { + reset_temp(temps, args[0], nb_temps, nb_globals); + temps[args[0]].state = TCG_TEMP_CONST; + temps[args[0]].val = 0; + assert(temps[args[0]].num_copies == 0); + gen_opc_buf[op_index] = op_to_movi(op); + gen_args[0] = args[0]; + gen_args[1] = 0; + args += 3; + gen_args += 2; + continue; + } + break; + } + /* Propagate constants through copy operations and do constant folding. Constants will be substituted to arguments by register allocator where needed and possible. Also detect copies. */ @@ -196,6 +321,37 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, gen_args += 2; args += 2; break; + case INDEX_op_add_i32: + case INDEX_op_sub_i32: + case INDEX_op_mul_i32: +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_add_i64: + case INDEX_op_sub_i64: + case INDEX_op_mul_i64: +#endif + if (temps[args[1]].state == TCG_TEMP_CONST + && temps[args[2]].state == TCG_TEMP_CONST) { + gen_opc_buf[op_index] = op_to_movi(op); + gen_args[0] = args[0]; + gen_args[1] = + do_constant_folding(op, temps[args[1]].val, + temps[args[2]].val); + reset_temp(temps, gen_args[0], nb_temps, nb_globals); + temps[gen_args[0]].state = TCG_TEMP_CONST; + temps[gen_args[0]].val = gen_args[1]; + assert(temps[gen_args[0]].num_copies == 0); + gen_args += 2; + args += 3; + break; + } else { + reset_temp(temps, args[0], nb_temps, nb_globals); + gen_args[0] = args[0]; + gen_args[1] = args[1]; + gen_args[2] = args[2]; + gen_args += 3; + args += 3; + break; + } case INDEX_op_call: for (i = 0; i < nb_globals; i++) { reset_temp(temps, i, nb_temps, nb_globals);