@@ -446,6 +446,50 @@ static void parallel_reset(void *opaque)
s->last_read_offset = ~0U;
}
+static int parallel_isa_statefn(ISADevice *dev, bool enabled)
+{
+ ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
+ ParallelState *s = &isa->state;
+ int base;
+
+ base = isa->iobase;
+ if (enabled) {
+ isa_init_irq(dev, &s->irq, isa->isairq);
+
+ if (s->hw_driver) {
+ register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
+ register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
+ isa_init_ioport_range(dev, base, 8);
+
+ register_ioport_write(base + 4, 1, 2, parallel_ioport_eppdata_write_hw2, s);
+ register_ioport_read(base + 4, 1, 2, parallel_ioport_eppdata_read_hw2, s);
+ register_ioport_write(base + 4, 1, 4, parallel_ioport_eppdata_write_hw4, s);
+ register_ioport_read(base + 4, 1, 4, parallel_ioport_eppdata_read_hw4, s);
+ isa_init_ioport(dev, base + 4);
+ register_ioport_write(base + 0x400, 8, 1, parallel_ioport_ecp_write, s);
+ register_ioport_read(base + 0x400, 8, 1, parallel_ioport_ecp_read, s);
+ isa_init_ioport_range(dev, base + 0x400, 8);
+ }
+ else {
+ register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
+ register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
+ isa_init_ioport_range(dev, base, 8);
+ }
+ } else {
+ isa_discard_irq(dev, isa->isairq);
+
+ isa_discard_ioport_range(dev, base, 8);
+ isa_unassign_ioport(base, 8);
+ if (s->hw_driver) {
+ isa_discard_ioport_range(dev, base + 4, 1);
+ isa_unassign_ioport(base + 4, 1);
+ isa_discard_ioport_range(dev, base + 0x400, 8);
+ isa_unassign_ioport(base + 0x400, 8);
+ }
+ }
+ return 0;
+}
+
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_isa_initfn(ISADevice *dev)
@@ -453,7 +497,6 @@ static int parallel_isa_initfn(ISADevice *dev)
static int index;
ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
ParallelState *s = &isa->state;
- int base;
uint8_t dummy;
if (!s->chr) {
@@ -469,8 +512,6 @@ static int parallel_isa_initfn(ISADevice *dev)
isa->iobase = isa_parallel_io[isa->index];
index++;
- base = isa->iobase;
- isa_init_irq(dev, &s->irq, isa->isairq);
qemu_register_reset(parallel_reset, s);
if (qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
@@ -478,25 +519,7 @@ static int parallel_isa_initfn(ISADevice *dev)
s->status = dummy;
}
- if (s->hw_driver) {
- register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s);
- register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s);
- isa_init_ioport_range(dev, base, 8);
-
- register_ioport_write(base+4, 1, 2, parallel_ioport_eppdata_write_hw2, s);
- register_ioport_read(base+4, 1, 2, parallel_ioport_eppdata_read_hw2, s);
- register_ioport_write(base+4, 1, 4, parallel_ioport_eppdata_write_hw4, s);
- register_ioport_read(base+4, 1, 4, parallel_ioport_eppdata_read_hw4, s);
- isa_init_ioport(dev, base+4);
- register_ioport_write(base+0x400, 8, 1, parallel_ioport_ecp_write, s);
- register_ioport_read(base+0x400, 8, 1, parallel_ioport_ecp_read, s);
- isa_init_ioport_range(dev, base+0x400, 8);
- }
- else {
- register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
- register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
- isa_init_ioport_range(dev, base, 8);
- }
+ parallel_isa_statefn(dev, true);
return 0;
}
@@ -581,11 +604,13 @@ static ISADeviceInfo parallel_isa_info = {
.qdev.name = "isa-parallel",
.qdev.size = sizeof(ISAParallelState),
.init = parallel_isa_initfn,
+ .set_state = parallel_isa_statefn,
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32("index", ISAParallelState, index, -1),
DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7),
DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr),
+ DEFINE_PROP_BOOL("enabled", ISAParallelState, dev.enabled, true),
DEFINE_PROP_END_OF_LIST(),
},
};
Add "enabled" property. Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- hw/parallel.c | 69 ++++++++++++++++++++++++++++++++++++++------------------ 1 files changed, 47 insertions(+), 22 deletions(-)