From patchwork Mon May 9 21:34:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 94860 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B3B33B6F17 for ; Tue, 10 May 2011 07:36:58 +1000 (EST) Received: from localhost ([::1]:56427 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY8N-0005sN-Py for incoming@patchwork.ozlabs.org; Mon, 09 May 2011 17:36:55 -0400 Received: from eggs.gnu.org ([140.186.70.92]:38250) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY6W-0003E2-M6 for qemu-devel@nongnu.org; Mon, 09 May 2011 17:35:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QJY6V-0006B2-Q2 for qemu-devel@nongnu.org; Mon, 09 May 2011 17:35:00 -0400 Received: from mail-iw0-f173.google.com ([209.85.214.173]:38418) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY6V-0006Af-N0 for qemu-devel@nongnu.org; Mon, 09 May 2011 17:34:59 -0400 Received: by mail-iw0-f173.google.com with SMTP id 42so5560360iwl.4 for ; Mon, 09 May 2011 14:34:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:message-id:x-mailer :in-reply-to:references; bh=UbhtZZHurvdOmzu7SbyEdo/pZ3jvUkntNuOD00f8rsg=; b=OUwCGazs8Q7SJf78UgWKP/uYAFj7chhYxlioI/jZFxs9Z1LVU7fY04OL/iHZXYCV+s xbEv4Uv9RCk60vHdwComgiZ9AGYJQeBW1JssLJoL/vnWG8mD+eg6NSeFnNDUXPEViesM mhGNNWM5KeKn2L9wk8sQYjy7ft0cEUwYbTEy8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; b=UXMgJPYjJOHm1vEWR/Rv06rVP0oqSjvKwsucteS+0PupsHm0yLU4MwrgCT/kuXRXAK QsXM5x1fTcVB7XIdaC6Acj/HIZTW+DxnE1xlVvOh8TM0PzFpO2KLV2yZeU2hB2gt8qCi D/iLTOb5Z2O1JjJQD8KPXz+wXhaomAi8YzWyg= Received: by 10.42.158.66 with SMTP id g2mr94014icx.125.1304976899469; Mon, 09 May 2011 14:34:59 -0700 (PDT) Received: from localhost.localdomain (are.twiddle.net [75.101.38.216]) by mx.google.com with ESMTPS id ui7sm2549819icb.14.2011.05.09.14.34.58 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 09 May 2011 14:34:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 9 May 2011 14:34:17 -0700 Message-Id: <1304976889-29675-4-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304976889-29675-1-git-send-email-rth@twiddle.net> References: <1304976889-29675-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.214.173 Subject: [Qemu-devel] [PATCH 03/35] pci: Export pci_to_cpu_addr. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is, more or less, the read accessor to pci_bus_set_mem_base as a write accessor. It will be needed for implementing sparse memory spaces for Alpha. Signed-off-by: Richard Henderson --- hw/pci.c | 3 +-- hw/pci.h | 1 + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 0875654..0b2b943 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -800,8 +800,7 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name, return pci_dev; } -static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, - target_phys_addr_t addr) +target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, target_phys_addr_t addr) { return addr + bus->mem_base; } diff --git a/hw/pci.h b/hw/pci.h index c6a6eb6..8615cc2 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -246,6 +246,7 @@ void pci_device_reset(PCIDevice *dev); void pci_bus_reset(PCIBus *bus); void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base); +target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, target_phys_addr_t addr); PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr);