@@ -837,6 +837,14 @@ extern CPUState *cpu_single_env;
#define CPU_INTERRUPT_SIPI CPU_INTERRUPT_TGT_INT_2
#define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4
+/* The set of all bits that should be masked when single-stepping. */
+#define CPU_INTERRUPT_SSTEP_MASK \
+ (CPU_INTERRUPT_HARD \
+ | CPU_INTERRUPT_TGT_EXT_0 \
+ | CPU_INTERRUPT_TGT_EXT_1 \
+ | CPU_INTERRUPT_TGT_EXT_2 \
+ | CPU_INTERRUPT_TGT_EXT_3 \
+ | CPU_INTERRUPT_TGT_EXT_4)
#ifndef CONFIG_USER_ONLY
typedef void (*CPUInterruptHandler)(CPUState *, int);
@@ -360,10 +360,7 @@ int cpu_exec(CPUState *env1)
if (unlikely(interrupt_request)) {
if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {
/* Mask out external interrupts for this step. */
- interrupt_request &= ~(CPU_INTERRUPT_HARD |
- CPU_INTERRUPT_FIQ |
- CPU_INTERRUPT_SMI |
- CPU_INTERRUPT_NMI);
+ interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
}
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
This mask contains all of the bits that should be ignored while single stepping in the debugger. The mask contains 2 bits that are not currently cleared, but are also never set. The bits are included in the mask for consistency in handling of the CPU_INTERRUPT_TGT_EXT_N bits. Signed-off-by: Richard Henderson <rth@twiddle.net> --- cpu-all.h | 8 ++++++++ cpu-exec.c | 5 +---- 2 files changed, 9 insertions(+), 4 deletions(-)