From patchwork Fri Jun 4 19:14:22 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 54682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E8F99B7D1F for ; Sat, 5 Jun 2010 05:40:22 +1000 (EST) Received: from localhost ([127.0.0.1]:41152 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OKck0-0001Yl-Ht for incoming@patchwork.ozlabs.org; Fri, 04 Jun 2010 15:39:40 -0400 Received: from [140.186.70.92] (port=37681 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OKcNI-0005GM-Oc for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:16:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OKcNH-0002L9-Q1 for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:16:12 -0400 Received: from are.twiddle.net ([75.149.56.221]:54776) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OKcNH-0002Kv-5K for qemu-devel@nongnu.org; Fri, 04 Jun 2010 15:16:11 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id 5FCAF46D; Fri, 4 Jun 2010 12:16:08 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o54JG5qM007231; Fri, 4 Jun 2010 12:16:05 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o54JFvB9007228; Fri, 4 Jun 2010 12:15:57 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 4 Jun 2010 12:14:22 -0700 Message-Id: <1275678883-7082-15-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1275678883-7082-1-git-send-email-rth@twiddle.net> References: <1275678883-7082-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: agraf@suse.de, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 14/35] tcg-s390: Rearrange register allocation order. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Try to avoid conflicting with the outgoing function call arguments. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c | 23 +++++++++++++---------- 1 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index 95ea3c8..3944cb1 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -149,22 +149,25 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { }; #endif +/* Since R6 is a potential argument register, choose it last of the + call-saved registers. Likewise prefer the call-clobbered registers + in reverse order to maximize the chance of avoiding the arguments. */ static const int tcg_target_reg_alloc_order[] = { - TCG_REG_R6, - TCG_REG_R7, - TCG_REG_R8, - TCG_REG_R9, - TCG_REG_R10, - TCG_REG_R11, - TCG_REG_R12, TCG_REG_R13, + TCG_REG_R12, + TCG_REG_R11, + TCG_REG_R10, + TCG_REG_R9, + TCG_REG_R8, + TCG_REG_R7, + TCG_REG_R6, TCG_REG_R14, TCG_REG_R0, TCG_REG_R1, - TCG_REG_R2, - TCG_REG_R3, - TCG_REG_R4, TCG_REG_R5, + TCG_REG_R4, + TCG_REG_R3, + TCG_REG_R2, }; static const int tcg_target_call_iarg_regs[] = {