From patchwork Thu May 27 20:46:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 53807 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D33A2B7D1B for ; Fri, 28 May 2010 07:24:56 +1000 (EST) Received: from localhost ([127.0.0.1]:48929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHkZQ-0001Zi-LJ for incoming@patchwork.ozlabs.org; Thu, 27 May 2010 17:24:52 -0400 Received: from [140.186.70.92] (port=55916 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHjz3-0001yz-4A for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OHjz1-0005IQ-FG for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:17 -0400 Received: from are.twiddle.net ([75.149.56.221]:51203) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OHjz1-0005II-4r for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:15 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id 8A467A21; Thu, 27 May 2010 13:47:14 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o4RKlDoQ030917; Thu, 27 May 2010 13:47:13 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o4RKlDcC030916; Thu, 27 May 2010 13:47:13 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 May 2010 13:46:02 -0700 Message-Id: <1274993204-30766-21-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1274993204-30766-1-git-send-email-rth@twiddle.net> References: <1274993204-30766-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: agraf@suse.de, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 20/62] tcg-s390: Implement setcond. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c | 66 ++++++++++++++++++++++++++++++++++-------------- 1 files changed, 47 insertions(+), 19 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index f21a9ca..b150d1a 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -381,6 +381,42 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg data, } } +static void tgen32_cmp(TCGContext *s, TCGCond c, TCGReg r1, TCGReg r2) +{ + if (c > TCG_COND_GT) { + /* unsigned */ + tcg_out_insn(s, RR, CLR, r1, r2); + } else { + /* signed */ + tcg_out_insn(s, RR, CR, r1, r2); + } +} + +static void tgen64_cmp(TCGContext *s, TCGCond c, TCGReg r1, TCGReg r2) +{ + if (c > TCG_COND_GT) { + /* unsigned */ + tcg_out_insn(s, RRE, CLGR, r1, r2); + } else { + /* signed */ + tcg_out_insn(s, RRE, CGR, r1, r2); + } +} + +static void tgen_setcond(TCGContext *s, TCGType type, TCGCond c, + TCGReg dest, TCGReg r1, TCGReg r2) +{ + if (type == TCG_TYPE_I32) { + tgen32_cmp(s, c, r1, r2); + } else { + tgen64_cmp(s, c, r1, r2); + } + /* Emit: r1 = 1; if (cc) goto over; r1 = 0; over: */ + tcg_out_movi(s, type, dest, 1); + tcg_out_insn(s, RI, BRC, tcg_cond_to_s390_cond[c], (4 + 4) >> 1); + tcg_out_movi(s, type, dest, 0); +} + #if defined(CONFIG_SOFTMMU) static void tcg_prepare_qemu_ldst(TCGContext* s, int data_reg, int addr_reg, int mem_index, int opc, @@ -958,27 +994,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_brcond_i64: - if (args[2] > TCG_COND_GT) { - /* unsigned */ - /* clgr %ra0, %ra1 */ - tcg_out_insn(s, RRE, CLGR, args[0], args[1]); - } else { - /* signed */ - /* cgr %ra0, %ra1 */ - tcg_out_insn(s, RRE, CGR, args[0], args[1]); - } + tgen64_cmp(s, args[2], args[0], args[1]); goto do_brcond; - case INDEX_op_brcond_i32: - if (args[2] > TCG_COND_GT) { - /* unsigned */ - /* clr %ra0, %ra1 */ - tcg_out_insn(s, RR, CLR, args[0], args[1]); - } else { - /* signed */ - /* cr %ra0, %ra1 */ - tcg_out_insn(s, RR, CR, args[0], args[1]); - } + tgen32_cmp(s, args[2], args[0], args[1]); do_brcond: l = &s->labels[args[3]]; if (l->has_value) { @@ -993,6 +1012,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_insn(s, RR, BCR, tcg_cond_to_s390_cond[args[2]], TCG_REG_R13); break; + case INDEX_op_setcond_i32: + tgen_setcond(s, TCG_TYPE_I32, args[3], args[0], args[1], args[2]); + break; + case INDEX_op_setcond_i64: + tgen_setcond(s, TCG_TYPE_I64, args[3], args[0], args[1], args[2]); + break; + case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, LD_UINT8); break; @@ -1083,6 +1109,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_sar_i32, { "r", "0", "Ri" } }, { INDEX_op_brcond_i32, { "r", "r" } }, + { INDEX_op_setcond_i32, { "r", "r", "r" } }, { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } }, @@ -1129,6 +1156,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_sar_i64, { "r", "r", "Ri" } }, { INDEX_op_brcond_i64, { "r", "r" } }, + { INDEX_op_setcond_i64, { "r", "r", "r" } }, #endif { -1 },