From patchwork Thu May 27 20:45:51 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 53798 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 00705B7D1C for ; Fri, 28 May 2010 07:12:50 +1000 (EST) Received: from localhost ([127.0.0.1]:49350 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHkNU-0005qh-ST for incoming@patchwork.ozlabs.org; Thu, 27 May 2010 17:12:32 -0400 Received: from [140.186.70.92] (port=37957 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OHjyo-0001qf-2R for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OHjym-0005EB-Hq for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:01 -0400 Received: from are.twiddle.net ([75.149.56.221]:51175) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OHjym-0005E2-Cd for qemu-devel@nongnu.org; Thu, 27 May 2010 16:47:00 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id B3B53A21; Thu, 27 May 2010 13:46:59 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o4RKkxvi030873; Thu, 27 May 2010 13:46:59 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o4RKkwjm030872; Thu, 27 May 2010 13:46:58 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 May 2010 13:45:51 -0700 Message-Id: <1274993204-30766-10-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1274993204-30766-1-git-send-email-rth@twiddle.net> References: <1274993204-30766-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: agraf@suse.de, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 09/62] tcg-s390: Mark R0 & R15 reserved. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Don't merely exclude them from the register allocation order. Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index eb3ca38..6988937 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -124,8 +124,7 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, - /* XXX many insns can't be used with R0, so we better avoid it for now */ - /* TCG_REG_R0 */ + TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, @@ -1304,6 +1303,10 @@ void tcg_target_init(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* another temporary */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12); + /* XXX many insns can't be used with R0, so we better avoid it for now */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); + /* The stack pointer. */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R15); tcg_add_target_add_op_defs(s390_op_defs); }