| Message ID | 1270287446-3904-1-git-send-email-agraf@suse.de |
|---|---|
| State | New |
| Headers | show |
diff --git a/qemu-timer.h b/qemu-timer.h index a7eac98..d2e15f4 100644 --- a/qemu-timer.h +++ b/qemu-timer.h @@ -98,9 +98,9 @@ static inline int64_t cpu_get_real_ticks(void) #else /* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */ unsigned long junk; - __asm__ __volatile__ ("mftbu %1\n\t" - "mftb %L0\n\t" - "mftbu %0\n\t" + __asm__ __volatile__ ("mfspr %1,269\n\t" /* mftbu */ + "mfspr %L0,268\n\t" /* mftb */ + "mfspr %0,269\n\t" /* mftbu */ "cmpw %0,%1\n\t" "bne $-16" : "=r" (retval), "=r" (junk));
PowerPC CPUs have had two ways to read the time base for quite some time now. They provide it using the mfspr instruction or - if a special bit is set in that opcode - using mftb. For timekeeping we're currently using mftb. While trying to get Qemu up and running on an e500v2 system, I stumbled over the CPU not supporting mftbu. It just throws an illegal instruction trap. So let's read the SPR values instead. All PPC CPUs should support them anyways. I tested this patch on an e500v2 system where it makes qemu work and on my 970MP system with 32-bit user space where everything still works with this patch applied. Signed-off-by: Alexander Graf <agraf@suse.de> --- qemu-timer.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)