Message ID | 1265105301-3455-12-git-send-email-andre.przywara@amd.com |
---|---|
State | New |
Headers | show |
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 6e6ee54..b03a363 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -153,7 +153,6 @@ typedef struct x86_def_t { CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A) static x86_def_t x86_defs[] = { -#ifdef TARGET_X86_64 { .name = "qemu64", .level = 4, @@ -252,7 +251,6 @@ static x86_def_t x86_defs[] = { .xlevel = 0x80000008, .model_id = "Common KVM processor" }, -#endif { .name = "qemu32", .level = 4,
Since 64-bit capability is just another CPUID bit we now properly mask, there is no reason anymore to hide the 64-bit capable CPU models from a 32-bit only QEMU. All 64-bit CPUs can be used perfectly in 32-bit legacy mode anyway, so these models also make sense for 32-bit. Signed-off-by: Andre Przywara <andre.przywara@amd.com> --- target-i386/cpuid.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)