@@ -1331,8 +1331,9 @@ static int ac97_initfn (PCIDevice *dev)
c[0x3c] = 0x00; /* intr_ln interrupt line rw */
c[0x3d] = 0x01; /* intr_pn interrupt pin ro */
- pci_register_bar (&s->dev, 0, 256 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
- pci_register_bar (&s->dev, 1, 64 * 4, PCI_ADDRESS_SPACE_IO, ac97_map);
+ pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO,
+ ac97_map);
+ pci_register_bar (&s->dev, 1, 64 * 4, PCI_BASE_ADDRESS_SPACE_IO, ac97_map);
register_savevm ("ac97", 0, 2, ac97_save, ac97_load, s);
qemu_register_reset (ac97_on_reset, s);
AUD_register_card ("ac97", &s->card);
@@ -3239,10 +3239,10 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
/* memory #1 memory-mapped I/O */
/* XXX: s->vga.vram_size must be a power of two */
pci_register_bar((PCIDevice *)d, 0, 0x2000000,
- PCI_ADDRESS_SPACE_MEM_PREFETCH, cirrus_pci_lfb_map);
+ PCI_BASE_ADDRESS_MEM_PREFETCH, cirrus_pci_lfb_map);
if (device_id == CIRRUS_ID_CLGD5446) {
pci_register_bar((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE,
- PCI_ADDRESS_SPACE_MEM, cirrus_pci_mmio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, cirrus_pci_mmio_map);
}
vmstate_register(0, &vmstate_pci_cirrus_vga, d);
/* XXX: ROM BIOS */
@@ -1086,10 +1086,10 @@ static int pci_e1000_init(PCIDevice *pci_dev)
e1000_mmio_write, d);
pci_register_bar((PCIDevice *)d, 0, PNPMMIO_SIZE,
- PCI_ADDRESS_SPACE_MEM, e1000_mmio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, e1000_mmio_map);
pci_register_bar((PCIDevice *)d, 1, IOPORT_SIZE,
- PCI_ADDRESS_SPACE_IO, ioport_map);
+ PCI_BASE_ADDRESS_SPACE_IO, ioport_map);
memmove(d->eeprom_data, e1000_eeprom_template,
sizeof e1000_eeprom_template);
@@ -412,18 +412,20 @@ static void pci_reset(EEPRO100State * s)
/* BIST (built-in self test) */
#if defined(TARGET_I386)
// !!! workaround for buggy bios
-//~ #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0
+//~ #define PCI_BASE_ADDRESS_MEM_PREFETCH 0
#endif
#if 0
/* PCI Base Address Registers */
/* CSR Memory Mapped Base Address */
PCI_CONFIG_32(PCI_BASE_ADDRESS_0,
- PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_MEM_PREFETCH);
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_PREFETCH);
/* CSR I/O Mapped Base Address */
- PCI_CONFIG_32(PCI_BASE_ADDRESS_1, PCI_ADDRESS_SPACE_IO);
+ PCI_CONFIG_32(PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_SPACE_IO);
#if 0
/* Flash Memory Mapped Base Address */
- PCI_CONFIG_32(PCI_BASE_ADDRESS_2, 0xfffe0000 | PCI_ADDRESS_SPACE_MEM);
+ PCI_CONFIG_32(PCI_BASE_ADDRESS_2,
+ 0xfffe0000 | PCI_BASE_ADDRESS_SPACE_MEMORY);
#endif
#endif
/* Expansion ROM Base Address (depends on boot disable!!!) */
@@ -1693,11 +1695,11 @@ static int nic_init(PCIDevice *pci_dev, uint32_t device)
cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s);
pci_register_bar(&s->dev, 0, PCI_MEM_SIZE,
- PCI_ADDRESS_SPACE_MEM |
- PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_mmio_map);
- pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO,
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_PREFETCH, pci_mmio_map);
+ pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO,
pci_map);
- pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM,
+ pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY,
pci_mmio_map);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
@@ -1027,7 +1027,7 @@ static int es1370_initfn (PCIDevice *dev)
c[0x3e] = 0x0c;
c[0x3f] = 0x80;
- pci_register_bar (&s->dev, 0, 256, PCI_ADDRESS_SPACE_IO, es1370_map);
+ pci_register_bar (&s->dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, es1370_map);
register_savevm ("es1370", 0, 2, es1370_save, es1370_load, s);
qemu_register_reset (es1370_on_reset, s);
@@ -219,11 +219,11 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
pci_conf[0x51] |= 0x08; /* enable IDE1 */
}
- pci_register_bar(dev, 0, 0x8, PCI_ADDRESS_SPACE_IO, ide_map);
- pci_register_bar(dev, 1, 0x4, PCI_ADDRESS_SPACE_IO, ide_map);
- pci_register_bar(dev, 2, 0x8, PCI_ADDRESS_SPACE_IO, ide_map);
- pci_register_bar(dev, 3, 0x4, PCI_ADDRESS_SPACE_IO, ide_map);
- pci_register_bar(dev, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map);
+ pci_register_bar(dev, 0, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
+ pci_register_bar(dev, 1, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
+ pci_register_bar(dev, 2, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
+ pci_register_bar(dev, 3, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
+ pci_register_bar(dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
pci_conf[0x3d] = 0x01; // interrupt on pin 1
@@ -122,7 +122,7 @@ static int pci_piix_ide_initfn(PCIIDEState *d)
qemu_register_reset(piix3_reset, d);
piix3_reset(d);
- pci_register_bar(&d->dev, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map);
+ pci_register_bar(&d->dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
vmstate_register(0, &vmstate_ide_pci, d);
@@ -2090,11 +2090,11 @@ static int lsi_scsi_init(PCIDevice *dev)
lsi_ram_writefn, s);
pci_register_bar((struct PCIDevice *)s, 0, 256,
- PCI_ADDRESS_SPACE_IO, lsi_io_mapfunc);
+ PCI_BASE_ADDRESS_SPACE_IO, lsi_io_mapfunc);
pci_register_bar((struct PCIDevice *)s, 1, 0x400,
- PCI_ADDRESS_SPACE_MEM, lsi_mmio_mapfunc);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, lsi_mmio_mapfunc);
pci_register_bar((struct PCIDevice *)s, 2, 0x2000,
- PCI_ADDRESS_SPACE_MEM, lsi_ram_mapfunc);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, lsi_ram_mapfunc);
s->queue = qemu_malloc(sizeof(lsi_queue));
s->queue_len = 1;
s->active_commands = 0;
@@ -115,5 +115,5 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
d->config[0x3d] = 0x01; // interrupt on pin 1
pci_register_bar(d, 0, 0x80000,
- PCI_ADDRESS_SPACE_MEM, macio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, macio_map);
}
@@ -719,7 +719,7 @@ static int pci_ne2000_init(PCIDevice *pci_dev)
pci_conf[0x3d] = 1; // interrupt pin 0
pci_register_bar(&d->dev, 0, 0x100,
- PCI_ADDRESS_SPACE_IO, ne2000_map);
+ PCI_BASE_ADDRESS_SPACE_IO, ne2000_map);
s = &d->ne2000;
s->irq = d->dev.irq[0];
@@ -1213,7 +1213,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
/* Register I/O spaces */
pci_register_bar((PCIDevice *)opp, 0, 0x40000,
- PCI_ADDRESS_SPACE_MEM, &openpic_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, &openpic_map);
} else {
opp = qemu_mallocz(sizeof(openpic_t));
}
@@ -420,7 +420,7 @@ static void pci_unregister_io_regions(PCIDevice *pci_dev)
r = &pci_dev->io_regions[i];
if (!r->size || r->addr == PCI_BAR_UNMAPPED)
continue;
- if (r->type == PCI_ADDRESS_SPACE_IO) {
+ if (r->type == PCI_BASE_ADDRESS_SPACE_IO) {
isa_unassign_ioport(r->addr, r->size);
} else {
cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
@@ -492,7 +492,7 @@ static void pci_update_mappings(PCIDevice *d)
for(i = 0; i < PCI_NUM_REGIONS; i++) {
r = &d->io_regions[i];
if (r->size != 0) {
- if (r->type & PCI_ADDRESS_SPACE_IO) {
+ if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
if (cmd & PCI_COMMAND_IO) {
new_addr = pci_get_long(d->config + pci_bar(i));
new_addr = new_addr & ~(r->size - 1);
@@ -529,7 +529,7 @@ static void pci_update_mappings(PCIDevice *d)
/* now do the real mapping */
if (new_addr != r->addr) {
if (r->addr != PCI_BAR_UNMAPPED) {
- if (r->type & PCI_ADDRESS_SPACE_IO) {
+ if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
int class;
/* NOTE: specific hack for IDE in PC case:
only one byte must be mapped. */
@@ -771,7 +771,7 @@ static void pci_info_device(PCIDevice *d)
r = &d->io_regions[i];
if (r->size != 0) {
monitor_printf(mon, " BAR%d: ", i);
- if (r->type & PCI_ADDRESS_SPACE_IO) {
+ if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
monitor_printf(mon, "I/O at 0x%04x [0x%04x].\n",
r->addr, r->addr + r->size - 1);
} else {
@@ -1135,7 +1135,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
if (!r->size)
continue;
monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "",
- i, r->type & PCI_ADDRESS_SPACE_IO ? "i/o" : "mem",
+ i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem",
r->addr, r->addr + r->size - 1);
}
}
@@ -79,10 +79,6 @@ typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
uint32_t addr, uint32_t size, int type);
typedef int PCIUnregisterFunc(PCIDevice *pci_dev);
-#define PCI_ADDRESS_SPACE_MEM 0x00
-#define PCI_ADDRESS_SPACE_IO 0x01
-#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
-
typedef struct PCIIORegion {
uint32_t addr; /* current PCI mapping address. -1 means not mapped */
#define PCI_BAR_UNMAPPED (~(uint32_t)0)
@@ -113,6 +109,9 @@ typedef struct PCIIORegion {
#define PCI_HEADER_TYPE_CARDBUS 2
#define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80
#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
+#define PCI_BASE_ADDRESS_SPACE_IO 0x01
+#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
+#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
@@ -1997,10 +1997,10 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state);
pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
- PCI_ADDRESS_SPACE_IO, pcnet_ioport_map);
+ PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map);
pci_register_bar((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE,
- PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, pcnet_mmio_map);
s->irq = pci_dev->irq[0];
s->phys_mem_read = pci_physical_memory_read;
@@ -3325,10 +3325,10 @@ static int pci_rtl8139_init(PCIDevice *dev)
cpu_register_io_memory(rtl8139_mmio_read, rtl8139_mmio_write, s);
pci_register_bar(&s->dev, 0, 0x100,
- PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map);
+ PCI_BASE_ADDRESS_SPACE_IO, rtl8139_ioport_map);
pci_register_bar(&s->dev, 1, 0x100,
- PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, rtl8139_mmio_map);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
rtl8139_reset(&s->dev.qdev);
@@ -383,9 +383,9 @@ pci_ebus_init1(PCIDevice *s)
s->config[0x0D] = 0x0a; // latency_timer
s->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
- pci_register_bar(s, 0, 0x1000000, PCI_ADDRESS_SPACE_MEM,
+ pci_register_bar(s, 0, 0x1000000, PCI_BASE_ADDRESS_SPACE_MEMORY,
ebus_mmio_mapfunc);
- pci_register_bar(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM,
+ pci_register_bar(s, 1, 0x800000, PCI_BASE_ADDRESS_SPACE_MEMORY,
ebus_mmio_mapfunc);
return 0;
}
@@ -1730,7 +1730,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
OHCI_TYPE_PCI, ohci->pci_dev.name, 0);
pci_register_bar((struct PCIDevice *)ohci, 0, 256,
- PCI_ADDRESS_SPACE_MEM, ohci_mapfunc);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, ohci_mapfunc);
return 0;
}
@@ -1084,7 +1084,7 @@ static int usb_uhci_common_initfn(UHCIState *s)
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
pci_register_bar(&s->dev, 4, 0x20,
- PCI_ADDRESS_SPACE_IO, uhci_map);
+ PCI_BASE_ADDRESS_SPACE_IO, uhci_map);
vmstate_register(0, &vmstate_uhci, s);
return 0;
@@ -94,7 +94,7 @@ static int pci_vga_initfn(PCIDevice *dev)
/* XXX: VGA_RAM_SIZE must be a power of two */
pci_register_bar(&d->dev, 0, VGA_RAM_SIZE,
- PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
+ PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map);
if (s->bios_size) {
unsigned int bios_total_size;
@@ -103,7 +103,7 @@ static int pci_vga_initfn(PCIDevice *dev)
while (bios_total_size < s->bios_size)
bios_total_size <<= 1;
pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size,
- PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
+ PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map);
}
return 0;
}
@@ -415,7 +415,7 @@ static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
pci_register_bar(&proxy->pci_dev, 1,
msix_bar_size(&proxy->pci_dev),
- PCI_ADDRESS_SPACE_MEM,
+ PCI_BASE_ADDRESS_SPACE_MEMORY,
msix_mmio_map);
} else
vdev->nvectors = 0;
@@ -426,7 +426,7 @@ static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
if (size & (size-1))
size = 1 << qemu_fls(size);
- pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
+ pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
virtio_map);
virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
@@ -1182,9 +1182,9 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
s->card.config[0x3c] = 0xff; /* End */
pci_register_bar(&s->card, 0, 0x10,
- PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
+ PCI_BASE_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
pci_register_bar(&s->card, 1, VGA_RAM_SIZE,
- PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
+ PCI_BASE_ADDRESS_MEM_PREFETCH, pci_vmsvga_map_mem);
vmsvga_init(&s->chip, VGA_RAM_SIZE);
@@ -413,7 +413,7 @@ static int i6300esb_init(PCIDevice *dev)
pci_conf[0x0e] = 0x00;
pci_register_bar(&d->dev, 0, 0x10,
- PCI_ADDRESS_SPACE_MEM, i6300esb_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, i6300esb_map);
vmstate_register(-1, &vmstate_i6300esb, d);