From patchwork Mon Oct 19 14:37:36 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 36383 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 418D4B7063 for ; Tue, 20 Oct 2009 01:52:45 +1100 (EST) Received: from localhost ([127.0.0.1]:46667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MztbG-0007Ss-Hl for incoming@patchwork.ozlabs.org; Mon, 19 Oct 2009 10:52:42 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MztMw-0001rW-JS for qemu-devel@nongnu.org; Mon, 19 Oct 2009 10:37:54 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MztMq-0001md-1w for qemu-devel@nongnu.org; Mon, 19 Oct 2009 10:37:51 -0400 Received: from [199.232.76.173] (port=41448 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MztMm-0001m1-7q for qemu-devel@nongnu.org; Mon, 19 Oct 2009 10:37:45 -0400 Received: from cantor.suse.de ([195.135.220.2]:46486 helo=mx1.suse.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MztMl-0005O9-Cy for qemu-devel@nongnu.org; Mon, 19 Oct 2009 10:37:43 -0400 Received: from relay2.suse.de (relay-ext.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 9E96393F19; Mon, 19 Oct 2009 16:37:40 +0200 (CEST) From: Alexander Graf To: qemu-devel Date: Mon, 19 Oct 2009 16:37:36 +0200 Message-Id: <1255963059-10298-7-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1255963059-10298-6-git-send-email-agraf@suse.de> References: <1255963059-10298-1-git-send-email-agraf@suse.de> <1255963059-10298-2-git-send-email-agraf@suse.de> <1255963059-10298-3-git-send-email-agraf@suse.de> <1255963059-10298-4-git-send-email-agraf@suse.de> <1255963059-10298-5-git-send-email-agraf@suse.de> <1255963059-10298-6-git-send-email-agraf@suse.de> X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.4-2.6 Cc: Carsten Otte , hare@suse.de Subject: [Qemu-devel] [PATCH 6/9] S390 GDB stub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In order to debug funny kernel breakages it's always good to have a working gdb stub around. While Uli's patches don't include one one, I needed one that's at least good enough for 'bt' and some variable examinations during early bootup. So here it is - the absolute basics to get the qemu gdb stub running with s390x targets. Sgined-off-by: Alexander Graf --- gdbstub.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 52 insertions(+), 0 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index 315f606..49f6fe3 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -1348,6 +1348,55 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return 8; } +#elif defined (TARGET_S390X) + +#define NUM_CORE_REGS S390_NUM_TOTAL_REGS + +static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) +{ + switch (n) { + case S390_PSWM_REGNUM: GET_REGL(env->psw.mask); break; + case S390_PSWA_REGNUM: GET_REGL(env->psw.addr); break; + case S390_R0_REGNUM ... S390_R15_REGNUM: + GET_REGL(env->regs[n-S390_R0_REGNUM]); break; + case S390_A0_REGNUM ... S390_A15_REGNUM: + GET_REG32(env->aregs[n-S390_A0_REGNUM]); break; + case S390_FPC_REGNUM: GET_REG32(env->fpc); break; + case S390_F0_REGNUM ... S390_F15_REGNUM: + /* XXX */ + break; + case S390_PC_REGNUM: GET_REGL(env->psw.addr); break; + case S390_CC_REGNUM: GET_REG32(env->cc); break; + } + + return 0; +} + +static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) +{ + target_ulong tmpl; + uint32_t tmp32; + int r = 8; + tmpl = ldtul_p(mem_buf); + tmp32 = ldl_p(mem_buf); + + switch (n) { + case S390_PSWM_REGNUM: env->psw.mask = tmpl; break; + case S390_PSWA_REGNUM: env->psw.addr = tmpl; break; + case S390_R0_REGNUM ... S390_R15_REGNUM: + env->regs[n-S390_R0_REGNUM] = tmpl; break; + case S390_A0_REGNUM ... S390_A15_REGNUM: + env->aregs[n-S390_A0_REGNUM] = tmp32; r=4; break; + case S390_FPC_REGNUM: env->fpc = tmp32; r=4; break; + case S390_F0_REGNUM ... S390_F15_REGNUM: + /* XXX */ + break; + case S390_PC_REGNUM: env->psw.addr = tmpl; break; + case S390_CC_REGNUM: env->cc = tmp32; r=4; break; + } + + return r; +} #else #define NUM_CORE_REGS 0 @@ -1616,6 +1665,9 @@ static void gdb_set_cpu_pc(GDBState *s, target_ulong pc) s->c_cpu->pc = pc; #elif defined (TARGET_ALPHA) s->c_cpu->pc = pc; +#elif defined (TARGET_S390X) + cpu_synchronize_state(s->c_cpu); + s->c_cpu->psw.addr = pc; #endif }