From patchwork Thu Sep 10 22:20:55 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 33399 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by bilbo.ozlabs.org (Postfix) with ESMTPS id 18169B7080 for ; Fri, 11 Sep 2009 08:45:57 +1000 (EST) Received: from localhost ([127.0.0.1]:57635 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MlsOo-0006c8-A5 for incoming@patchwork.ozlabs.org; Thu, 10 Sep 2009 18:45:54 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mls43-0004gG-Ko for qemu-devel@nongnu.org; Thu, 10 Sep 2009 18:24:27 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mls3v-0004av-K9 for qemu-devel@nongnu.org; Thu, 10 Sep 2009 18:24:23 -0400 Received: from [199.232.76.173] (port=40039 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mls3v-0004ai-Gl for qemu-devel@nongnu.org; Thu, 10 Sep 2009 18:24:19 -0400 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14]:37811 helo=TX2EHSOBE008.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1Mls3u-0001Kt-VF for qemu-devel@nongnu.org; Thu, 10 Sep 2009 18:24:19 -0400 Received: from mail9-tx2-R.bigfish.com (10.9.14.250) by TX2EHSOBE008.bigfish.com (10.9.40.28) with Microsoft SMTP Server id 8.1.340.0; Thu, 10 Sep 2009 22:24:17 +0000 Received: from mail9-tx2 (localhost.localdomain [127.0.0.1]) by mail9-tx2-R.bigfish.com (Postfix) with ESMTP id 169DBA60104 for ; Thu, 10 Sep 2009 22:24:18 +0000 (UTC) X-SpamScore: 1 X-BigFish: VPS1(zzzz1202hzzz32i203h62h) X-Spam-TCS-SCL: 1:0 X-FB-SS: 5, Received: by mail9-tx2 (MessageSwitch) id 1252621456227969_14047; Thu, 10 Sep 2009 22:24:16 +0000 (UCT) Received: from ausb3extmailp02.amd.com (ausb3extmailp02.amd.com [163.181.251.22]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail9-tx2.bigfish.com (Postfix) with ESMTP id 09D11FE8052 for ; Thu, 10 Sep 2009 22:24:15 +0000 (UTC) Received: from ausb3twp01.amd.com (ausb3twp01.amd.com [163.181.250.37]) by ausb3extmailp02.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n8AMOB1Q021765 for ; Thu, 10 Sep 2009 17:24:14 -0500 X-WSS-ID: 0KPS0WA-01-L7G-02 X-M-MSG: Received: from sausexbh1.amd.com (sausexbh1.amd.com [163.181.22.101]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.7.0) with ESMTP id 2CD3910284D0 for ; Thu, 10 Sep 2009 17:24:09 -0500 (CDT) Received: from sausexmb4.amd.com ([163.181.3.15]) by sausexbh1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 10 Sep 2009 17:24:10 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by sausexmb4.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 10 Sep 2009 17:24:10 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 11 Sep 2009 00:23:56 +0200 From: Andre Przywara To: qemu-devel@nongnu.org Date: Fri, 11 Sep 2009 00:20:55 +0200 Message-ID: <1252621257-26364-11-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1252621257-26364-1-git-send-email-andre.przywara@amd.com> References: <1252621257-26364-1-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 10 Sep 2009 22:23:56.0809 (UTC) FILETIME=[6308D790:01CA3265] MIME-Version: 1.0 X-detected-operating-system: by monty-python.gnu.org: Windows 2000 SP4, XP SP1+ Cc: Andre Przywara Subject: [Qemu-devel] [PATCH 10/12] cpuid: propagate further CPUID leafs when -cpu host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org -cpu host currently only propagates the CPU's family/model/stepping, the brand name and the feature bits. Add a whitelist of safe CPUID leafs to let the guest see the actual CPU's cache details and other things. Signed-off-by: Andre Przywara --- target-i386/cpu.h | 5 ++++- target-i386/cpuid.c | 28 ++++++++++++++++++++++------ 2 files changed, 26 insertions(+), 7 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index b71d440..0f00d6a 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -563,6 +563,9 @@ typedef union { #define NB_MMU_MODES 2 +#define CPUID_FLAGS_VENDOR_OVERRIDE 1 +#define CPUID_FLAGS_HOST 2 + typedef struct CPUX86State { /* standard registers */ target_ulong regs[CPU_NB_REGS]; @@ -672,7 +675,7 @@ typedef struct CPUX86State { uint32_t cpuid_ext2_features; uint32_t cpuid_ext3_features; uint32_t cpuid_apic_id; - int cpuid_vendor_override; + uint32_t cpuid_flags; /* MTRRs */ uint64_t mtrr_fixed[11]; diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 4be1449..ca8fc45 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -102,7 +102,7 @@ typedef struct x86_def_t { uint32_t features, ext_features, ext2_features, ext3_features; uint32_t xlevel; char model_id[48]; - int vendor_override; + uint32_t flags; } x86_def_t; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) @@ -398,7 +398,7 @@ static int cpu_x86_fill_host(x86_def_t *x86_cpu_def) x86_cpu_def->ext2_features = edx; x86_cpu_def->ext3_features = ecx; cpu_x86_fill_model_id(x86_cpu_def->model_id); - x86_cpu_def->vendor_override = 0; + x86_cpu_def->flags = CPUID_FLAGS_HOST; return 0; } @@ -503,7 +503,7 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i); x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i); } - x86_cpu_def->vendor_override = 1; + x86_cpu_def->flags |= CPUID_FLAGS_VENDOR_OVERRIDE; } else if (!strcmp(featurestr, "model_id")) { pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id), val); @@ -574,7 +574,7 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2; env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3; } - env->cpuid_vendor_override = def->vendor_override; + env->cpuid_flags = def->flags; env->cpuid_level = def->level; if (def->family > 0x0f) env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20); @@ -605,17 +605,32 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) return 0; } +#define CPUID_LEAF_PROPAGATE ((1 << 0x02) | (1 << 0x04) | (1 << 0x05) |\ + (1 << 0x0D)) +#define CPUID_LEAF_PROPAGATE_EXTENDED ((1 << 0x05) | (1 << 0x06) |\ + (1 << 0x08) | (1 << 0x19) | (1 << 0x1A)) + void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - /* test if maximum index reached */ if (index & 0x80000000) { + /* test if maximum index reached */ if (index > env->cpuid_xlevel) index = env->cpuid_level; + if ((env->cpuid_flags & CPUID_FLAGS_HOST) && + ((1 << (index - 0x80000000)) & CPUID_LEAF_PROPAGATE_EXTENDED)) { + host_cpuid(index, count, eax, ebx, ecx, edx); + return; + } } else { if (index > env->cpuid_level) index = env->cpuid_level; + if ((env->cpuid_flags & CPUID_FLAGS_HOST) && + ((1 << index) & CPUID_LEAF_PROPAGATE)) { + host_cpuid(index, count, eax, ebx, ecx, edx); + return; + } } switch(index) { @@ -631,7 +646,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, * this if you want to use KVM's sysenter/syscall emulation * in compatibility mode and when doing cross vendor migration */ - if (kvm_enabled() && !env->cpuid_vendor_override) + if (kvm_enabled() && + (env->cpuid_flags & CPUID_FLAGS_VENDOR_OVERRIDE) == 0) host_cpuid(0, 0, NULL, ebx, ecx, edx); break; case 1: