From patchwork Fri Sep 19 04:54:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 391075 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 00B5314019D for ; Fri, 19 Sep 2014 14:55:54 +1000 (EST) Received: from localhost ([::1]:55997 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUqEa-0003FN-5m for incoming@patchwork.ozlabs.org; Fri, 19 Sep 2014 00:55:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56001) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUqDl-00023l-EQ for qemu-devel@nongnu.org; Fri, 19 Sep 2014 00:55:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XUqDa-0006pb-8i for qemu-devel@nongnu.org; Fri, 19 Sep 2014 00:55:01 -0400 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]:60560) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUqDa-0006p2-1l for qemu-devel@nongnu.org; Fri, 19 Sep 2014 00:54:50 -0400 Received: by mail-pa0-f41.google.com with SMTP id et14so3064187pad.28 for ; Thu, 18 Sep 2014 21:54:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IllKaaNucvcXd4mdw7RCp6VI57yEFFCG8nL4p4gQvzI=; b=QvAH3j3Vz5LR68inf40M2M4zcEB1tDVp+/rltayOnyjr6ix987qw9Pz5K2jjIKZBl2 to97GrjNRiQflbUsLm2aAnAm1lx4CIHYDViB52c5N6riq7e2hYwohZGXMW33+apYOSBw NfLDSUHvZNo/1VwMTXpoL4JBu4Pk6c36llw8As+O/ynjl23tQbdnRJgUOjGFjyhPXu08 ksldvsn1Gh1f2w3WddZGngn2uncwor4pefSqwthTylYSNodI2fzBYoHZYxqWIc5dY3i/ Ws1R8+fslyC50nrKvy0RfpgnZf8bzz8+wBCb9+y/5VrIRcx0QZF6Vl0+vjD4jvLrk1zD PTyQ== X-Received: by 10.68.249.101 with SMTP id yt5mr10946567pbc.156.1411102484167; Thu, 18 Sep 2014 21:54:44 -0700 (PDT) Received: from localhost (123-243-147-200.static.tpgi.com.au. [123.243.147.200]) by mx.google.com with ESMTPSA id f12sm582221pat.36.2014.09.18.21.54.42 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 18 Sep 2014 21:54:43 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org Date: Fri, 19 Sep 2014 14:54:39 +1000 Message-Id: <120e6baba924a76fb818509f509719758308bd10.1411096688.git.alistair23@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::229 Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, konstanty@ieee.org, martin.galvan@tallertechnologies.com Subject: [Qemu-devel] [Patch v2 5/8] target_arm: Parameterise the irq lines for armv7m_init X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch allows the board to specifiy the number of NVIC interrupt lines when using armv7m_init. Signed-off-by: Alistair Francis --- hw/arm/armv7m.c | 7 ++++--- hw/arm/stellaris.c | 4 +++- include/hw/arm/arm.h | 2 +- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 5c1f7b3..5e684a0 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -167,14 +167,14 @@ static void armv7m_reset(void *opaque) Returns the NVIC array. */ qemu_irq *armv7m_init(MemoryRegion *system_memory, - int flash_size, int sram_size, + int flash_size, int sram_size, int num_irq, const char *kernel_filename, const char *cpu_model) { ARMCPU *cpu; CPUARMState *env; DeviceState *nvic; /* FIXME: make this local state. */ - static qemu_irq pic[64]; + qemu_irq *pic = g_new(qemu_irq, num_irq); int image_size; uint64_t entry; uint64_t lowaddr; @@ -207,11 +207,12 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory, armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); + qdev_prop_set_uint32(nvic, "num-irq", num_irq); env->nvic = nvic; qdev_init_nofail(nvic); sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); - for (i = 0; i < 64; i++) { + for (i = 0; i < num_irq; i++) { pic[i] = qdev_get_gpio_in(nvic, i); } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 9738722..b7cd753 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -29,6 +29,8 @@ #define BP_OLED_SSI 0x02 #define BP_GAMEPAD 0x04 +#define NUM_IRQ_LINES 64 + typedef const struct { const char *name; uint32_t did0; @@ -1238,7 +1240,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, memory_region_add_subregion(system_memory, 0x20000000, sram); pic = armv7m_init(system_memory, flash_size, sram_size, - kernel_filename, cpu_model); + NUM_IRQ_LINES, kernel_filename, cpu_model); if (board->dc1 & (1 << 16)) { dev = sysbus_create_varargs(TYPE_STELLARIS_ADC, 0x40038000, diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h index cefc9e6..3e7c463 100644 --- a/include/hw/arm/arm.h +++ b/include/hw/arm/arm.h @@ -16,7 +16,7 @@ /* armv7m.c */ qemu_irq *armv7m_init(MemoryRegion *system_memory, - int flash_size, int sram_size, + int flash_size, int sram_size, int num_irq, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */