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Frédéric Pétrot
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Apply
«
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
plugins/execlog.c: correct dump of registers values
plugins/execlog.c: correct dump of registers values
- - 1 -
-
-
-
2024-06-20
Frédéric Pétrot
New
x86_64/atomic128-ldst.h: fix arch include guard
x86_64/atomic128-ldst.h: fix arch include guard
- - 2 -
-
-
-
2023-06-20
Frédéric Pétrot
New
[v2] hw/intc: sifive_plic: Renumber the S irqs for numa support
[v2] hw/intc: sifive_plic: Renumber the S irqs for numa support
- - 2 -
-
-
-
2022-11-14
Frédéric Pétrot
New
hw/intc: sifive_plic: Renumber the S irqs for numa support
hw/intc: sifive_plic: Renumber the S irqs for numa support
- - 2 -
-
-
-
2022-11-11
Frédéric Pétrot
New
[v2] target/riscv: fix shifts shamt value for rv128c
[v2] target/riscv: fix shifts shamt value for rv128c
- - 2 -
-
-
-
2022-07-10
Frédéric Pétrot
New
target/riscv: fix right shifts shamt value for rv128c
target/riscv: fix right shifts shamt value for rv128c
- - - -
-
-
-
2022-07-08
Frédéric Pétrot
New
target/riscv/debug.c: keep experimental rv128 support working
target/riscv/debug.c: keep experimental rv128 support working
1 - 1 -
-
-
-
2022-06-02
Frédéric Pétrot
New
target/riscv: replace TARGET_LONG_BITS in gdbstub
- - - -
-
-
-
2022-04-09
Frédéric Pétrot
New
target/riscv: use xlen in forging isa string
target/riscv: replace TARGET_LONG_BITS in gdbstub
- - - -
-
-
-
2022-04-09
Frédéric Pétrot
New
[v2] target/riscv: correct "code should not be reached" for x-rv128
[v2] target/riscv: correct "code should not be reached" for x-rv128
- - 2 -
-
-
-
2022-01-24
Frédéric Pétrot
New
target/riscv: correct "code should not be reached" for x-rv128
target/riscv: correct "code should not be reached" for x-rv128
- - - -
-
-
-
2022-01-24
Frédéric Pétrot
New
[v8,18/18] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,17/18] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,15/18] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,14/18] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,13/18] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,12/18] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,11/18] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,10/18] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,09/18] target/riscv: accessors to registers upper part and 128-bit load/store
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,08/18] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,07/18] target/riscv: setup everything for rv64 to support rv128 execution
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,06/18] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,05/18] target/riscv: separation of bitwise logic and arithmetic helpers
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,04/18] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,03/18] qemu/int128: addition of div/rem 128-bit operations
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,02/18] exec/memop: Adding signed quad and octo defines
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v8,01/18] exec/memop: Adding signedness to quad definitions
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2022-01-06
Frédéric Pétrot
New
[v7,18/18] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,17/18] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,15/18] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,14/18] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,13/18] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,12/18] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,11/18] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,10/18] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,09/18] target/riscv: accessors to registers upper part and 128-bit load/store
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,08/18] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,07/18] target/riscv: setup everything for rv64 to support rv128 execution
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,06/18] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,05/18] target/riscv: separation of bitwise logic and arithmetic helpers
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,04/18] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,03/18] qemu/int128: addition of div/rem 128-bit operations
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,02/18] exec/memop: Adding signed quad and octo defines
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v7,01/18] exec/memop: Adding signedness to quad definitions
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2021-12-13
Frédéric Pétrot
New
[v6,18/18] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,17/18] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,15/18] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,14/18] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,13/18] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,12/18] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,11/18] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,10/18] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,09/18] target/riscv: accessors to registers upper part and 128-bit load/store
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,08/18] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,07/18] target/riscv: setup everything for rv64 to support rv128 execution
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,06/18] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,05/18] target/riscv: separation of bitwise logic and arithmetic helpers
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,04/18] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,03/18] qemu/int128: addition of div/rem 128-bit operations
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,02/18] exec/memop: Adding signed quad and octo defines
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v6,01/18] exec/memop: Adding signedness to quad definitions
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2021-11-28
Frédéric Pétrot
New
[v5,18/18] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,17/18] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,15/18] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,14/18] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,13/18] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,12/18] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,11/18] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,10/18] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,09/18] target/riscv: accessors to registers upper part and 128-bit load/store
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,08/18] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,07/18] target/riscv: setup everything so that riscv128-softmmu compiles
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,06/18] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,05/18] target/riscv: separation of bitwise logic and arithmetic helpers
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,04/18] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,03/18] qemu/int128: addition of div/rem 128-bit operations
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,02/18] exec/memop: Adding signed quad and octo defines
Adding partial support for 128-bit riscv target
- - 3 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v5,01/18] exec/memop: Adding signedness to quad definitions
Adding partial support for 128-bit riscv target
- - 2 -
-
-
-
2021-11-12
Frédéric Pétrot
New
[v4,17/17] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,16/17] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,15/17] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,14/17] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,13/17] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,12/17] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,11/17] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-25
Frédéric Pétrot
New
[v4,10/17] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,09/17] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - 1 -
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2021-10-25
Frédéric Pétrot
New
[v4,08/17] target/riscv: accessors to registers upper part and 128-bit load/store
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,07/17] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,06/17] target/riscv: setup everything so that riscv128-softmmu compiles
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,05/17] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - 1 -
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2021-10-25
Frédéric Pétrot
New
[v4,04/17] target/riscv: separation of bitwise logic and aritmetic helpers
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,03/17] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - 1 -
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2021-10-25
Frédéric Pétrot
New
[v4,02/17] qemu/int128: addition of a few 128-bit operations
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
[v4,01/17] exec/memop: Rename MO_Q definition as MO_UQ and add MO_UO
Adding partial support for 128-bit riscv target
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2021-10-25
Frédéric Pétrot
New
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