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[0/5,v3] RISC-V: Add gdb xml files and gdbstub support.

Message ID CAFyWVaZ5tQq4eGaZiPBq7172PB_x3JCqV6c2xo=wSJdgbJakKQ@mail.gmail.com
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Series RISC-V: Add gdb xml files and gdbstub support. | expand

Message

Jim Wilson Jan. 30, 2019, 2:49 a.m. UTC 
This is the 3rd version of the patch set, updated as per the review
from Richard and Alistair, and updated for current top of tree.  Parts
1 and 2 are the same.  Part 3 is smaller because some of it was moved
to part 5.  Part 5 is bigger because it received part of part 3.
Parts 4 and 5 have changed because the csr support was rewritten.  The
illegal instruction traps are no longer inside the csr support code,
but it still has mode checks that I need to disable, so I still need a
debugger mode, but it doesn't do as much as before.  Also, what was
one function is now about one hundred functions, so rather than add a
debugger parameter to lots of functions that don't need it, I put it
in the CPURISCVState struct.  This also helps fix a bug, because
debugger mode is only appropriate for system qemu, and should not be
enabled for user qemu.  The new patch set gets this right.  As a
result of this, part 4 also ends up smaller, and part 5 is rewritten a
bit to use the new interface to the csr support.  Otherwise it is
effectively the same code as before.

Jim